MIMXRT685-AUD-EVK

Overview

The i.MX RT600 is a crossover MCU family optimized for 32-bit immersive audio playback and voice user interface applications combining a high-performance Cadence Tensilica HiFi 4 audio DSP core with a next-generation Cortex-M33 core. The i.MX RT600 family of crossover MCUs is designed to unlock the potential of voice-assisted end nodes with a secure, power-optimized embedded processor.

The MIMXRT685-AUD-EVK board is an audio-focused evaluation kit for the i.MX RT685 crossover MCU, featuring a CS42448 audio codec and multiple audio interfaces.

Hardware

MIMXRT685SFVKB Cortex-M33 (300 MHz, 4.5 MB on-chip SRAM) core processor with Cadence Xtensa HiFi4 DSP
Onboard, high-speed USB, Link2 debug probe with CMSIS-DAP protocol (supporting Cortex M33 debug only)
High speed USB port with micro A/B connector for the host or device functionality
UART, I2C and SPI port bridging from i.MX RT685 target to USB via the on-board debug probe
64 MB Macronix Quad SPI Flash operating at 1.8 V
NXP PCA9420UK PMIC
User LEDs
Reset and User buttons
CS42448 audio codec

For more information about the MIMXRT685 SoC and MIMXRT685-AUD-EVK board, see these references:

Supported Features

The mimxrt685_aud_evk board supports the hardware features listed below.

on-chip / on-board: Feature integrated in the SoC / present on the board.
2 / 2: Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo: Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

`mimxrt685_aud_evk/mimxrt685s/cm33` target

On-target memory for this board target: 3 MiB of RAM, 64 MiB of Flash.

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M33F CPU1	`arm,cortex-m33f`
ADC	on-chip	LPC LPADC1	`nxp,lpc-lpadc`
ARM architecture	on-chip	LPC Flexcomm node6	`nxp,lpc-flexcomm`
Audio	on-chip	NXP DMIC1	`nxp,dmic`
Clock control	on-chip	LPC SYSCON & CLKCTL IP node2	`nxp,lpc-syscon`
Clock monitor	on-chip	NXP BASIC Frequency Measurement (FREQME / fmeas) module1	`nxp,fmeas`
Comparator	on-chip	NXP Kinetis ACMP (Analog CoMParator)1	`nxp,kinetis-acmp`
Counter	on-chip	NXP MCUX Standard Timer/Counter5	`nxp,lpc-ctimer`
	on-chip	NXP Multirate Timer1	`nxp,mrt`
	on-chip	NXP Multirate Timer Channel4	`nxp,mrt-channel`
	on-chip	Driver that uses the NXP LPC RTC High resolution counter1	`nxp,lpc-rtc-highres`
CRC	on-chip	NXP LPC CRC device1	`nxp,lpc-crc`
DMA	on-chip	NXP LPC DMA controller2	`nxp,lpc-dma`
DSP	on-chip	NXP PowerQuad DSP coprocessor1	`nxp,powerquad`
GPIO & Headers	on-chip	LPC GPIO1	`nxp,lpc-gpio`
GPIO & Headers	on-chip	LPC GPIO port device6	`nxp,lpc-gpio-port`
Hardware information	on-chip	NXP LPC 128-bit Unique identifier1	`nxp,lpc-uid`
I2C	on-chip	LPC I2C1 1	`nxp,lpc-i2c`
I3C	on-chip	NXP MCUX I3C controller1	`nxp,mcux-i3c`
Input	on-board	Group of GPIO-bound input keys1	`gpio-keys`
Interrupt controller	on-chip	NXP Pin interrupt and pattern match engine (PINT)1	`nxp,pint`
Interrupt controller	on-chip	ARMv8-M NVIC (Nested Vectored Interrupt Controller)1	`arm,v8m-nvic`
LED	on-board	Group of GPIO-controlled LEDs1	`gpio-leds`
Mailbox	on-chip	NXP i.MX Message Unit as Zephyr MBOX1	`nxp,mbox-imx-mu`
Miscellaneous	on-chip	NXP i.MX RTxxx DSP control driver (i.MX RT600 HiFi 4 DSP)1	`nxp,rt600-dsp-ctrl`
MMU / MPU	on-chip	ARMv8-M MPU (Memory Protection Unit)1	`arm,armv8m-mpu`
MTD	on-board	NXP FlexSPI NOR1	`nxp,imx-flexspi-nor`
MTD	on-board	Flash node1	`soc-nv-flash`
MUX	on-chip	NXP INPUTMUX peripheral binding1	`nxp,inputmux`
Pin control	on-chip	LPC I/O Pin Configuration (IOCON)1	`nxp,lpc-iocon`
Pin control	on-chip	RT600/RT500 Pin Controller1	`nxp,rt-iocon-pinctrl`
PWM	on-chip	NXP SCTimer PWM1	`nxp,sctimer-pwm`
Reset controller	on-chip	NXP RSTCTL Peripheral reset controller2	`nxp,rstctl`
RNG	on-chip	Kinetis TRNG (True Random Number Generator)1	`nxp,kinetis-trng`
RTC	on-chip	NXP LPC RTC1	`nxp,lpc-rtc`
SDHC	on-chip	NXP imx USDHC controller2	`nxp,imx-usdhc`
Serial controller	on-chip	LPC USART1	`nxp,lpc-usart`
SPI	on-chip	NXP LPC SPI controller1	`nxp,lpc-spi`
SPI	on-chip	NXP FlexSPI controller1	`nxp,imx-flexspi`
SRAM	on-chip	Generic on-chip SRAM2	`mmio-sram`
Timer	on-chip	NXP OS Timer on i.MX-RT5xx/6xx1	`nxp,os-timer`
Timer	on-chip	ARMv8-M System Tick1	`arm,armv8m-systick`
USB	on-chip	NXP USB High Speed PHY1	`nxp,usbphy`
USB	on-chip	NXP LPCIP3511 USB device mode1	`nxp,lpcip3511`
Watchdog	on-chip	LPC Windowed Watchdog Timer2	`nxp,lpc-wwdt`

Connections and IOs

The MIMXRT685 SoC has IOCON registers, which can be used to configure the functionality of a pin.

Name	Function	Usage
PIO0_1	USART	USART TX
PIO0_2	USART	USART RX
PIO0_10	GPIO	SW2
PIO0_14	GPIO	GREEN LED
PIO0_15	I2C	CS42448 SCL
PIO0_16	I2C	CS42448 SDA
PIO0_26	GPIO	BLUE LED
PIO0_31	GPIO	RED LED
PIO1_1	GPIO	SW1

System Clock

The MIMXRT685-AUD-EVK is configured to use the OS Event timer as a source for the system clock.

Serial Port

FLEXCOMM0 is configured as USART for the console. FLEXCOMM2 is configured as I2C for communication with the control port of the onboard CS42448 codec. The codec’s control port limits the I2C bus clock to 100 kHz.

Programming and Debugging

The mimxrt685_aud_evk board supports the runners and associated west commands listed below.

	flash	debug	rtt	debugserver	attach	reset
jlink	✅	✅	✅	✅	✅	✅
linkserver	✅ (default)	✅ (default)		✅	✅

Build and flash applications as usual (see Building an Application and Run an Application for more details).

Configuring a Debug Probe

A debug probe is used for both flashing and debugging the board. This board is configured by default to use the LPC-Link2.

Install the LinkServer Debug Host Tools and make sure they are in your search path. LinkServer works with the default CMSIS-DAP firmware included in the on-board debugger.

linkserver is the default runner for this board

west flash
west debug

Install the J-Link Debug Host Tools and make sure they are in your search path.

west flash -r jlink
west debug -r jlink

Configuring a Console

Connect a USB cable from your PC to the debug USB port, and use the serial terminal of your choice (minicom, putty, etc.) with the following settings:

Speed: 115200
Data: 8 bits
Parity: None
Stop bits: 1

Flashing

Here is an example for the Hello World application. This example uses the LinkServer Debug Host Tools as default.

# From the root of the zephyr repository
west build -b mimxrt685_aud_evk/mimxrt685s/cm33 samples/hello_world
west flash

Open a serial terminal, reset the board (press the RESET button), and you should see the following message in the terminal:

***** Booting Zephyr OS v4.x.x *****
Hello World! mimxrt685_aud_evk/mimxrt685s/cm33

Debugging