nxp,lpc-spi

Vendor: NXP Semiconductors

Note

An implementation of a driver matching this compatible is available in drivers/spi/spi_mcux_flexcomm.c.

Description

These nodes are “spi” bus nodes.

NXP LPC SPI controller

Properties

Properties not inherited from the base binding file.

Name

Type

Details

pre-delay

int

 
Delay in nanoseconds inserted between chip select assert to the first
clock edge. If not set, no additional delay is inserted.

post-delay

int

 
Delay in nanoseconds inserted between the last clock edge to the chip
select deassert. If not set, no additional delay is inserted.

frame-delay

int

 
Delay in nanoseconds inserted between data frames when chip select is
asserted and the EOF flag is set. If not set, no additional delay is
inserted.

transfer-delay

int

 
Delay in nanoseconds inserted between transfers when chip select is
deasserted. If not set, no additional delay is inserted.

def-char

int

 
Default character clocked out when the TX buffer pointer is NULL.
Applies to SPI master and slave configurations.

clock-frequency

int

 
Clock frequency the SPI peripheral is being driven at, in Hz.

cs-gpios

phandle-array

 
An array of chip select GPIOs to use. Each element
in the array specifies a GPIO. The index in the array
corresponds to the child node that the CS gpio controls.

Example:

  spi@... {
          cs-gpios = <&gpio0 23 GPIO_ACTIVE_LOW>,
                        <&gpio1 10 GPIO_ACTIVE_LOW>,
                        ...;

          spi-device@0 {
                  reg = <0>;
                  ...
          };
          spi-device@1 {
                  reg = <1>;
                  ...
          };
          ...
  };

The child node "spi-device@0" specifies a SPI device with
chip select controller gpio0, pin 23, and devicetree
GPIO flags GPIO_ACTIVE_LOW. Similarly, "spi-device@1" has CS GPIO
controller gpio1, pin 10, and flags GPIO_ACTIVE_LOW. Additional
devices can be configured in the same way.

If unsure about the flags cell, GPIO_ACTIVE_LOW is generally a safe
choice for a typical "CSn" pin. GPIO_ACTIVE_HIGH may be used if
intervening hardware inverts the signal to the peripheral device or
the line itself is active high.

If this property is not defined, no chip select GPIOs are set.
SPI controllers with dedicated CS pins do not need to define
the cs-gpios property.

overrun-character

int

 
The overrun character (ORC) is used when all bytes from the TX buffer
are sent, but the transfer continues due to RX.

pinctrl-0

phandles

 
Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

 
Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

 
Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

 
Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

 
Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

 
Names for the provided states. The number of names needs to match the
number of states.

resets

phandle-array

 
Reset information

reset-names

string-array

 
Name of each reset