MIMXRT1170-EVK/EVKB

Board Overview

MIMXRT1170-EVK/EVKB

Name:

mimxrt1170_evk

Vendor:

NXP Semiconductors

Architecture:

arm

SoC:

mimxrt1176

Browse board sources

Overview

The dual core i.MX RT1170 runs on the Cortex-M7 core at 1 GHz and on the Cortex-M4 at 400 MHz. The i.MX RT1170 MCU offers support over a wide temperature range and is qualified for consumer, industrial and automotive markets. Zephyr supports the initial revision of this EVK, as well as rev EVKB.

Hardware

• MIMXRT1176DVMAA MCU

  • 1GHz Cortex-M7 & 400Mhz Cortex-M4

  • 2MB SRAM with 512KB of TCM for Cortex-M7 and 256KB of TCM for Cortex-M4

• Memory

  • 512 Mbit SDRAM

  • 128 Mbit QSPI Flash

  • 512 Mbit Octal Flash

  • 2 Gbit raw NAND flash

  • 64 Mbit LPSPI flash

  • TF socket for SD card

• Display

  • MIPI LCD connector

• Ethernet

  • 10/100 Mbit/s Ethernet PHY

  • 10/100/1000 Mbit/s Ethernet PHY

• USB

  • USB 2.0 OTG connector

  • USB 2.0 host connector

• Audio

  • 3.5 mm audio stereo headphone jack

  • Board-mounted microphone

  • Left and right speaker out connectors

• Power

  • 5 V DC jack

• Debug

  • JTAG 20-pin connector

  • on-board debugger

• Sensor

  • FXOS8700CQ 6-axis e-compass

  • MIPI camera sensor connector

• Expansion port

  • Arduino interface

  • M.2 WIFI/BT interface

• CAN bus connector

For more information about the MIMXRT1170 SoC and MIMXRT1170-EVK board, see these references:

• i.MX RT1170 Website

• i.MX RT1170 Datasheet

• i.MX RT1170 Reference Manual

• MIMXRT1170-EVK Website

• MIMXRT1170-EVK Board Hardware User’s Guide

External Memory

This platform has the following external memories:

Device	Controller	Status
W9825G6KH SDRAM	SEMC	Enabled via device configuration data (DCD) block, which sets up the SEMC at boot time
IS25WP128 QSPI flash (RT1170 EVK)	FLEXSPI	Enabled via flash configuration block (FCB), which sets up the FLEXSPI at boot time.
W25Q512NWEIQ QSPI flash (RT1170 EVKB)	FLEXSPI	Enabled via flash configuration block (FCB), which sets up the FLEXSPI at boot time. Supported for XIP only.

Supported Features

NXP considers the MIMXRT1170-EVK as the superset board for the i.MX RT11xx family of MCUs. This board is a focus for NXP’s Full Platform Support for Zephyr, to better enable the entire RT11xx family.

The mimxrt1170_evk board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

mimxrt1170_evk

@

AB

/

mimxrt1176/cm4mimxrt1176/cm7

mimxrt1170_evk@A/mimxrt1176/cm4 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M4F CPU1	arm,cortex-m4f
ADC	on-chip	LPC LPADC2	nxp,lpc-lpadc
ARM architecture	on-chip	MCUX XBAR (Crossbar)3	nxp,mcux-xbar
CAN	on-chip	NXP FlexCAN CANFD controller3	nxp,flexcan-fd
Clock control	on-chip	i.MX CCM Rev2 (Clock Controller Module) IP node1	nxp,imx-ccm-rev2
	on-chip	Generic fixed factor clock provider1	fixed-factor-clock
	on-chip	i.MX ANATOP (Analog Clock Controller Module) IP node1	nxp,imx-anatop
	on-chip	Generic fixed-rate clock provider1	fixed-clock
Comparator	on-chip	NXP Kinetis ACMP (Analog CoMParator)4	nxp,kinetis-acmp
Counter	on-chip	NXP Periodic Interrupt Timer (PIT)2	nxp,pit
	on-chip	Child node for the Periodic Interrupt Timer node, intended for an individual timer channel8	nxp,pit-channel
Display	on-chip	NXP i.MX eLCDIF (Enhanced LCD Interface) controller1	nxp,imx-elcdif
DMA	on-chip	NXP MCUX EDMA controller1	nxp,mcux-edma
	on-chip	NXP PXP 2D DMA engine1	nxp,pxp
Ethernet	on-chip	NXP ENET IP Module1	nxp,enet
	on-chip	NXP ENET MAC/L2 Device1 1	nxp,enet-mac
	on-board	Microchip KSZ8081 Ethernet PHY device1	microchip,ksz8081
	on-chip	NXP ENET PTP (Precision Time Protocol) Clock1 1	nxp,enet-ptp-clock
	on-chip	NXP ENET1G IP Module1	nxp,enet1g
	on-board	Realtek RTL8211F Ethernet PHY device1	realtek,rtl8211f
GPIO & Headers	on-chip	i.MX GPIO13	nxp,imx-gpio
I2C	on-chip	NXP LPI2C controller2 4	nxp,lpi2c
I2S	on-chip	NXP mcux SAI-I2S controller1 3	nxp,mcux-i2s
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	ARMv7-M NVIC (Nested Vectored Interrupt Controller)1	arm,v7m-nvic
IPM	on-chip	i.MX Messaging Unit1	nxp,imx-mu
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
	on-board	Group of PWM-controlled LEDs1	pwm-leds
MDIO	on-chip	NXP ENET MDIO Features1 1	nxp,enet-mdio
Memory controller	on-chip	NXP Smart External Memory Controller (SEMC)1	nxp,imx-semc
MIPI-DSI	on-chip	NXP MCUX MIPI DSI1	nxp,imx-mipi-dsi
Miscellaneous	on-chip	NXP FlexIO controller2	nxp,flexio
MMU / MPU	on-chip	ARMv7-M Memory Protection Unit (MPU)1	arm,armv7m-mpu
MTD	on-board	NXP FlexSPI NOR1	nxp,imx-flexspi-nor
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
Pin control	on-chip	This compatible binding should be applied to the device’s iomuxc DTS node1	nxp,imx-iomuxc
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	nxp,mcux-rt11xx-pinctrl
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	nxp,mcux-rt-pinctrl
	on-chip	i.MX IOMUXC2	nxp,imx-gpr
PWM	on-chip	NXP QTMR PWM4	nxp,qtmr-pwm
	on-chip	NXP eFLEX PWM module with mcux-pwm submodules4	nxp,flexpwm
	on-chip	NXP MCUX PWM1 15	nxp,imx-pwm
RNG	on-chip	IMX CAAM (Cryptographic Acceleration and Assurance Module)1	nxp,imx-caam
SDHC	on-chip	NXP imx USDHC controller2	nxp,imx-usdhc
Sensors	on-board	FXOS8700 6-axis accelerometer/magnetometer sensor1	nxp,fxos8700
	on-chip	NXP MCUX QDEC4	nxp,mcux-qdec
Serial controller	on-chip	NXP LPUART1 11	nxp,lpuart
SPI	on-chip	NXP FlexSPI controller1 1	nxp,imx-flexspi
	on-chip	NXP LPSPI controller6	nxp,lpspi
SRAM	on-chip	Generic on-chip SRAM1	mmio-sram
Timer	on-chip	ARMv7-M System Tick1	arm,armv7m-systick
	on-chip	NXP MCUX General-Purpose HW Timer (GPT)1	nxp,gpt-hw-timer
	on-chip	NXP MCUX General-Purpose Timer (GPT)5	nxp,imx-gpt
USB	on-chip	NXP EHCI USB device mode2	nxp,ehci
	on-chip	NXP USB high speed phy that is used on NXP RTxxxx, RTxxx, MCX, LPC and Kinetis platforms if high speed usb is supported on these platforms2	nxp,usbphy
Video	on-chip	NXP MCUX CMOS sensor interface1	nxp,imx-csi
	on-chip	NXP MIPI CSI-2 Rx interface1	nxp,mipi-csi2rx
Watchdog	on-chip	imxRT watchdog1	nxp,imx-wdog

mimxrt1170_evk@A/mimxrt1176/cm7 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M7 CPU1	arm,cortex-m7
ADC	on-chip	LPC LPADC1 1	nxp,lpc-lpadc
ARM architecture	on-chip	MCUX XBAR (Crossbar)3	nxp,mcux-xbar
CAN	on-chip	NXP FlexCAN CANFD controller1 2	nxp,flexcan-fd
Clock control	on-chip	i.MX CCM Rev2 (Clock Controller Module) IP node1	nxp,imx-ccm-rev2
	on-chip	Generic fixed factor clock provider1	fixed-factor-clock
	on-chip	i.MX ANATOP (Analog Clock Controller Module) IP node1	nxp,imx-anatop
	on-chip	Generic fixed-rate clock provider1	fixed-clock
Comparator	on-chip	NXP Kinetis ACMP (Analog CoMParator)4	nxp,kinetis-acmp
Counter	on-chip	NXP Periodic Interrupt Timer (PIT)2	nxp,pit
	on-chip	Child node for the Periodic Interrupt Timer node, intended for an individual timer channel8	nxp,pit-channel
Display	on-chip	NXP i.MX eLCDIF (Enhanced LCD Interface) controller1	nxp,imx-elcdif
DMA	on-chip	NXP MCUX EDMA controller1	nxp,mcux-edma
	on-chip	NXP PXP 2D DMA engine1	nxp,pxp
Ethernet	on-chip	NXP ENET IP Module1	nxp,enet
	on-chip	NXP ENET MAC/L2 Device1 1	nxp,enet-mac
	on-board	Microchip KSZ8081 Ethernet PHY device1	microchip,ksz8081
	on-chip	NXP ENET PTP (Precision Time Protocol) Clock1 1	nxp,enet-ptp-clock
	on-chip	NXP ENET1G IP Module1	nxp,enet1g
	on-board	Realtek RTL8211F Ethernet PHY device1	realtek,rtl8211f
GPIO & Headers	on-chip	i.MX GPIO15	nxp,imx-gpio
	on-board	GPIO pins exposed on NXP 44-pin board-to-board camera connector1	nxp,cam-44pins-connector
I2C	on-chip	NXP LPI2C controller1 5	nxp,lpi2c
I2S	on-chip	NXP mcux SAI-I2S controller1 3	nxp,mcux-i2s
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	ARMv7-M NVIC (Nested Vectored Interrupt Controller)1	arm,v7m-nvic
IPM	on-chip	i.MX Messaging Unit1	nxp,imx-mu
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
	on-board	Group of PWM-controlled LEDs1	pwm-leds
MDIO	on-chip	NXP ENET MDIO Features1 1	nxp,enet-mdio
Memory controller	on-chip	NXP Smart External Memory Controller (SEMC)1	nxp,imx-semc
	on-chip	NXP FlexRAM on-chip ram controller If the flexram,bank-spec property is specified, then the flexram will be dynamically reconfigured to the configuration specified at runtime1	nxp,flexram
MIPI-DSI	on-chip	NXP MCUX MIPI DSI1	nxp,imx-mipi-dsi
Miscellaneous	on-chip	NXP FlexIO controller2	nxp,flexio
MMU / MPU	on-chip	ARMv7-M Memory Protection Unit (MPU)1	arm,armv7m-mpu
MTD	on-board	NXP FlexSPI NOR1	nxp,imx-flexspi-nor
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
Pin control	on-chip	This compatible binding should be applied to the device’s iomuxc DTS node1	nxp,imx-iomuxc
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	nxp,mcux-rt11xx-pinctrl
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	nxp,mcux-rt-pinctrl
	on-chip	i.MX IOMUXC2	nxp,imx-gpr
PWM	on-chip	NXP QTMR PWM4	nxp,qtmr-pwm
	on-chip	NXP eFLEX PWM module with mcux-pwm submodules4	nxp,flexpwm
	on-chip	NXP MCUX PWM1 15	nxp,imx-pwm
RNG	on-chip	IMX CAAM (Cryptographic Acceleration and Assurance Module)1	nxp,imx-caam
SDHC	on-chip	NXP imx USDHC controller1 1	nxp,imx-usdhc
Sensors	on-board	FXOS8700 6-axis accelerometer/magnetometer sensor1	nxp,fxos8700
	on-chip	NXP MCUX QDEC4	nxp,mcux-qdec
Serial controller	on-chip	NXP LPUART1 11	nxp,lpuart
SPI	on-chip	NXP FlexSPI controller1 1	nxp,imx-flexspi
	on-chip	NXP LPSPI controller1 5	nxp,lpspi
Timer	on-chip	ARMv7-M System Tick1	arm,armv7m-systick
	on-chip	NXP MCUX General-Purpose HW Timer (GPT)1	nxp,gpt-hw-timer
	on-chip	NXP MCUX General-Purpose Timer (GPT)5	nxp,imx-gpt
USB	on-chip	NXP EHCI USB device mode1 1	nxp,ehci
	on-chip	NXP USB high speed phy that is used on NXP RTxxxx, RTxxx, MCX, LPC and Kinetis platforms if high speed usb is supported on these platforms1 1	nxp,usbphy
Video	on-chip	NXP MCUX CMOS sensor interface1	nxp,imx-csi
	on-chip	NXP MIPI CSI-2 Rx interface1	nxp,mipi-csi2rx
Watchdog	on-chip	imxRT watchdog1	nxp,imx-wdog

mimxrt1170_evk@B/mimxrt1176/cm4 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M4F CPU1	arm,cortex-m4f
ADC	on-chip	LPC LPADC2	nxp,lpc-lpadc
ARM architecture	on-chip	MCUX XBAR (Crossbar)3	nxp,mcux-xbar
CAN	on-chip	NXP FlexCAN CANFD controller3	nxp,flexcan-fd
Clock control	on-chip	i.MX CCM Rev2 (Clock Controller Module) IP node1	nxp,imx-ccm-rev2
	on-chip	Generic fixed factor clock provider1	fixed-factor-clock
	on-chip	i.MX ANATOP (Analog Clock Controller Module) IP node1	nxp,imx-anatop
	on-chip	Generic fixed-rate clock provider1	fixed-clock
Comparator	on-chip	NXP Kinetis ACMP (Analog CoMParator)4	nxp,kinetis-acmp
Counter	on-chip	NXP Periodic Interrupt Timer (PIT)2	nxp,pit
	on-chip	Child node for the Periodic Interrupt Timer node, intended for an individual timer channel8	nxp,pit-channel
Display	on-chip	NXP i.MX eLCDIF (Enhanced LCD Interface) controller1	nxp,imx-elcdif
DMA	on-chip	NXP MCUX EDMA controller1	nxp,mcux-edma
	on-chip	NXP PXP 2D DMA engine1	nxp,pxp
Ethernet	on-chip	NXP ENET IP Module1	nxp,enet
	on-chip	NXP ENET MAC/L2 Device1 1	nxp,enet-mac
	on-board	Microchip KSZ8081 Ethernet PHY device1	microchip,ksz8081
	on-chip	NXP ENET PTP (Precision Time Protocol) Clock1 1	nxp,enet-ptp-clock
	on-chip	NXP ENET1G IP Module1	nxp,enet1g
	on-board	Realtek RTL8211F Ethernet PHY device1	realtek,rtl8211f
GPIO & Headers	on-chip	i.MX GPIO13	nxp,imx-gpio
I2C	on-chip	NXP LPI2C controller2 4	nxp,lpi2c
I2S	on-chip	NXP mcux SAI-I2S controller1 3	nxp,mcux-i2s
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	ARMv7-M NVIC (Nested Vectored Interrupt Controller)1	arm,v7m-nvic
IPM	on-chip	i.MX Messaging Unit1	nxp,imx-mu
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
	on-board	Group of PWM-controlled LEDs1	pwm-leds
MDIO	on-chip	NXP ENET MDIO Features1 1	nxp,enet-mdio
Memory controller	on-chip	NXP Smart External Memory Controller (SEMC)1	nxp,imx-semc
MIPI-DSI	on-chip	NXP MCUX MIPI DSI1	nxp,imx-mipi-dsi
Miscellaneous	on-chip	NXP FlexIO controller2	nxp,flexio
MMU / MPU	on-chip	ARMv7-M Memory Protection Unit (MPU)1	arm,armv7m-mpu
MTD	on-board	NXP FlexSPI NOR1	nxp,imx-flexspi-nor
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
Pin control	on-chip	This compatible binding should be applied to the device’s iomuxc DTS node1	nxp,imx-iomuxc
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	nxp,mcux-rt11xx-pinctrl
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	nxp,mcux-rt-pinctrl
	on-chip	i.MX IOMUXC2	nxp,imx-gpr
PWM	on-chip	NXP QTMR PWM4	nxp,qtmr-pwm
	on-chip	NXP eFLEX PWM module with mcux-pwm submodules4	nxp,flexpwm
	on-chip	NXP MCUX PWM1 15	nxp,imx-pwm
RNG	on-chip	IMX CAAM (Cryptographic Acceleration and Assurance Module)1	nxp,imx-caam
SDHC	on-chip	NXP imx USDHC controller2	nxp,imx-usdhc
Sensors	on-chip	NXP MCUX QDEC4	nxp,mcux-qdec
Serial controller	on-chip	NXP LPUART1 11	nxp,lpuart
SPI	on-chip	NXP FlexSPI controller1 1	nxp,imx-flexspi
	on-chip	NXP LPSPI controller1 5	nxp,lpspi
SRAM	on-chip	Generic on-chip SRAM1	mmio-sram
Timer	on-chip	ARMv7-M System Tick1	arm,armv7m-systick
	on-chip	NXP MCUX General-Purpose HW Timer (GPT)1	nxp,gpt-hw-timer
	on-chip	NXP MCUX General-Purpose Timer (GPT)5	nxp,imx-gpt
USB	on-chip	NXP EHCI USB device mode2	nxp,ehci
	on-chip	NXP USB high speed phy that is used on NXP RTxxxx, RTxxx, MCX, LPC and Kinetis platforms if high speed usb is supported on these platforms2	nxp,usbphy
Video	on-chip	NXP MCUX CMOS sensor interface1	nxp,imx-csi
	on-chip	NXP MIPI CSI-2 Rx interface1	nxp,mipi-csi2rx
Watchdog	on-chip	imxRT watchdog1	nxp,imx-wdog

mimxrt1170_evk@B/mimxrt1176/cm7 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M7 CPU1	arm,cortex-m7
ADC	on-chip	LPC LPADC1 1	nxp,lpc-lpadc
ARM architecture	on-chip	MCUX XBAR (Crossbar)3	nxp,mcux-xbar
Bluetooth	on-board	Bluetooth module that uses NXP’s Bluetooth Module (e.g1	nxp,bt-hci-uart
CAN	on-chip	NXP FlexCAN CANFD controller1 2	nxp,flexcan-fd
Clock control	on-chip	i.MX CCM Rev2 (Clock Controller Module) IP node1	nxp,imx-ccm-rev2
	on-chip	Generic fixed factor clock provider1	fixed-factor-clock
	on-chip	i.MX ANATOP (Analog Clock Controller Module) IP node1	nxp,imx-anatop
	on-chip	Generic fixed-rate clock provider1	fixed-clock
Comparator	on-chip	NXP Kinetis ACMP (Analog CoMParator)4	nxp,kinetis-acmp
Counter	on-chip	NXP Periodic Interrupt Timer (PIT)2	nxp,pit
	on-chip	Child node for the Periodic Interrupt Timer node, intended for an individual timer channel8	nxp,pit-channel
Display	on-chip	NXP i.MX eLCDIF (Enhanced LCD Interface) controller1	nxp,imx-elcdif
DMA	on-chip	NXP MCUX EDMA controller1	nxp,mcux-edma
	on-chip	NXP PXP 2D DMA engine1	nxp,pxp
Ethernet	on-chip	NXP ENET IP Module1	nxp,enet
	on-chip	NXP ENET MAC/L2 Device1 1	nxp,enet-mac
	on-board	Generic MII PHY1	ethernet-phy
	on-chip	NXP ENET PTP (Precision Time Protocol) Clock1 1	nxp,enet-ptp-clock
	on-chip	NXP ENET1G IP Module1	nxp,enet1g
	on-board	Realtek RTL8211F Ethernet PHY device1	realtek,rtl8211f
GPIO & Headers	on-chip	i.MX GPIO15	nxp,imx-gpio
	on-board	GPIO pins exposed on NXP 44-pin board-to-board camera connector1	nxp,cam-44pins-connector
I2C	on-chip	NXP LPI2C controller1 5	nxp,lpi2c
I2S	on-chip	NXP mcux SAI-I2S controller1 3	nxp,mcux-i2s
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	ARMv7-M NVIC (Nested Vectored Interrupt Controller)1	arm,v7m-nvic
IPM	on-chip	i.MX Messaging Unit1	nxp,imx-mu
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
	on-board	Group of PWM-controlled LEDs1	pwm-leds
MDIO	on-chip	NXP ENET MDIO Features1 1	nxp,enet-mdio
Memory controller	on-chip	NXP Smart External Memory Controller (SEMC)1	nxp,imx-semc
	on-chip	NXP FlexRAM on-chip ram controller If the flexram,bank-spec property is specified, then the flexram will be dynamically reconfigured to the configuration specified at runtime1	nxp,flexram
MIPI-DSI	on-chip	NXP MCUX MIPI DSI1	nxp,imx-mipi-dsi
Miscellaneous	on-chip	NXP FlexIO controller2	nxp,flexio
MMU / MPU	on-chip	ARMv7-M Memory Protection Unit (MPU)1	arm,armv7m-mpu
MTD	on-board	NXP FlexSPI NOR1	nxp,imx-flexspi-nor
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
Pin control	on-chip	This compatible binding should be applied to the device’s iomuxc DTS node1	nxp,imx-iomuxc
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	nxp,mcux-rt11xx-pinctrl
	on-chip	The node has the ‘pinctrl’ node label set in MCUX RT SoC’s devicetree1	nxp,mcux-rt-pinctrl
	on-chip	i.MX IOMUXC2	nxp,imx-gpr
PWM	on-chip	NXP QTMR PWM4	nxp,qtmr-pwm
	on-chip	NXP eFLEX PWM module with mcux-pwm submodules4	nxp,flexpwm
	on-chip	NXP MCUX PWM1 15	nxp,imx-pwm
RNG	on-chip	IMX CAAM (Cryptographic Acceleration and Assurance Module)1	nxp,imx-caam
SDHC	on-chip	NXP imx USDHC controller1 1	nxp,imx-usdhc
Sensors	on-chip	NXP MCUX QDEC4	nxp,mcux-qdec
Serial controller	on-chip	NXP LPUART2 10	nxp,lpuart
SPI	on-chip	NXP FlexSPI controller1 1	nxp,imx-flexspi
	on-chip	NXP LPSPI controller1 5	nxp,lpspi
Timer	on-chip	ARMv7-M System Tick1	arm,armv7m-systick
	on-chip	NXP MCUX General-Purpose HW Timer (GPT)1	nxp,gpt-hw-timer
	on-chip	NXP MCUX General-Purpose Timer (GPT)5	nxp,imx-gpt
USB	on-chip	NXP EHCI USB device mode1 1	nxp,ehci
	on-chip	NXP USB high speed phy that is used on NXP RTxxxx, RTxxx, MCX, LPC and Kinetis platforms if high speed usb is supported on these platforms1 1	nxp,usbphy
Video	on-chip	NXP MCUX CMOS sensor interface1	nxp,imx-csi
	on-chip	NXP MIPI CSI-2 Rx interface1	nxp,mipi-csi2rx
Watchdog	on-chip	imxRT watchdog1	nxp,imx-wdog

Connections and I/Os

The MIMXRT1170 SoC has six pairs of pinmux/gpio controllers.

Name	Function	Usage
WAKEUP	GPIO	SW7
GPIO_AD_04	GPIO	LED
GPIO_AD_24	LPUART1_TX	UART Console
GPIO_AD_25	LPUART1_RX	UART Console
GPIO_LPSR_00	CAN3_TX	flexcan
GPIO_LPSR_01	CAN3_RX	flexcan
GPIO_AD_29	SPI1_CS0	spi
GPIO_AD_28	SPI1_CLK	spi
GPIO_AD_30	SPI1_SDO	spi
GPIO_AD_31	SPI1_SDI	spi
GPIO_AD_08	LPI2C1_SCL	i2c
GPIO_AD_09	LPI2C1_SDA	i2c
GPIO_LPSR_05	LPI2C5_SCL	i2c
GPIO_LPSR_04	LPI2C5_SDA	i2c
GPIO_AD_04	FLEXPWM1_PWM2	pwm
GPIO_AD_32	ENET_MDC	Ethernet
GPIO_AD_33	ENET_MDIO	Ethernet
GPIO_DISP_B2_02	ENET_TX_DATA00	Ethernet
GPIO_DISP_B2_03	ENET_TX_DATA01	Ethernet
GPIO_DISP_B2_04	ENET_TX_EN	Ethernet
GPIO_DISP_B2_05	ENET_REF_CLK	Ethernet
GPIO_DISP_B2_06	ENET_RX_DATA00	Ethernet
GPIO_DISP_B2_07	ENET_RX_DATA01	Ethernet
GPIO_DISP_B2_08	ENET_RX_EN	Ethernet
GPIO_DISP_B2_09	ENET_RX_ER	Ethernet
GPIO_AD_17_SAI1_MCLK	SAI_MCLK	SAI
GPIO_AD_21_SAI1_TX_DATA00	SAI1_TX_DATA	SAI
GPIO_AD_22_SAI1_TX_BCLK	SAI1_TX_BCLK	SAI
GPIO_AD_23_SAI1_TX_SYNC	SAI1_TX_SYNC	SAI
GPIO_AD_17_SAI1_MCLK	SAI1_MCLK	SAI
GPIO_AD_20_SAI1_RX_DATA00	SAI1_RX_DATA00	SAI
GPIO_DISP_B2_10	LPUART2_TX	M.2 BT HCI
GPIO_DISP_B2_11	LPUART2_RX	M.2 BT HCI
GPIO_DISP_B2_12	LPUART2_CTS_B	M.2 BT HCI
GPIO_DISP_B2_13	LPUART1_RTS_B	M.2 BT HCI

Dual Core samples

Core	Boot Address	Comment
Cortex M7	0x30000000[630K]	primary core
Cortex M4	0x20020000[96k]	boots from OCRAM

Memory	Address[Size]	Comment
flexspi1	0x30000000[16M]	Cortex M7 flash
sdram0	0x80030000[64M]	Cortex M7 ram
ocram	0x20020000[512K]	Cortex M4 “flash”
sram1	0x20000000[128K]	Cortex M4 ram
ocram2	0x200C0000[512K]	Mailbox/shared memory

Only the first 16K of ocram2 has the correct MPU region attributes set to be used as shared memory

System Clock

The MIMXRT1170 SoC is configured to use SysTick as the system clock source, running at 996MHz. When targeting the M4 core, SysTick will also be used, running at 400MHz

When power management is enabled, the 32 KHz low frequency oscillator on the board will be used as a source for the GPT timer to generate a system clock. This clock enables lower power states, at the cost of reduced resolution

Serial Port

The MIMXRT1170 SoC has 12 UARTs. LPUART1 is configured for the console, LPUART2 for the Bluetooth Host Controller Interface (BT HCI), and the remaining are not used.

Fetch Binary Blobs

The board Bluetooth/WiFi module requires fetching some binary blob files, to do that run the command:

west blobs fetch hal_nxp

Note

Only Bluetooth functionality is currently supported.

Programming and Debugging

The mimxrt1170_evk board supports the runners and associated west commands listed below.

	flash	debug	attach	debugserver	rtt
jlink	✅	✅	✅	✅	✅
linkserver	✅ (default)	✅ (default)	✅	✅
pyocd	✅	✅	✅	✅	✅

Build and flash applications as usual (see Building an Application and Run an Application for more details).

Building a Dual-Core Image

Dual core samples load the M4 core image from flash into the shared ocram region. The M7 core then sets the M4 boot address to this region. The only sample currently enabled for dual core builds is the openamp sample. To flash a dual core sample, the M4 image must be flashed first, so that it is written to flash. Then, the M7 image must be flashed. The openamp sysbuild sample will do this automatically by setting the image order.

The secondary core can be debugged normally in single core builds (where the target is mimxrt1170_evk/mimxrt1176/cm4). For dual core builds, the secondary core should be placed into a loop, then a debugger can be attached (see AN13264, section 4.2.3 for more information)

Launching Images Targeting M4 Core

If building targeting the M4 core, the M7 core must first run code to launch the M4 image, by copying it into the ocram region then kicking off the M4 core. When building using sysbuild targeting the M4 core, a minimal “launcher” image will be built and flashed to the M7 core, which loads and kicks off the M4 core. Therefore when developing an application intended to run standalone on the M4 core, it is recommended to build with sysbuild, like so:

# From the root of the zephyr repository
west build -b mimxrt1170_evk/mimxrt1176/cm4 --sysbuild samples/hello_world
west flash

If desired, this behavior can be disabled by building with -DSB_CONFIG_SECOND_CORE_MCUX_LAUNCHER=n

Configuring a Debug Probe

A debug probe is used for both flashing and debugging the board. The on-board debugger listed below works with the LinkServer runner by default, or can be reprogrammed with JLink firmware.

• MIMXRT1170-EVKB: MCU-Link CMSIS-DAP Onboard Debug Probe

• MIMXRT1170-EVK: OpenSDA DAPLink Onboard Debug Probe

Using J-Link

JLink is the default runner for this board. Install the J-Link Debug Host Tools and make sure they are in your search path.

There are two options: the onboard debug circuit can be updated with Segger J-Link firmware, or J-Link External Debug Probe can be attached to the EVK. See Using J-Link with MIMXRT1170-EVKB or Using J-Link with MIMXRT1160-EVK or MIMXRT1170-EVK for more details.

Using LinkServer

Install the LinkServer Debug Host Tools and make sure they are in your search path. LinkServer works with the default CMSIS-DAP firmware included in the on-board debugger.

Use the -r linkserver option with West to use the LinkServer runner.

west flash -r linkserver

Alternatively, pyOCD can be used to flash and debug the board by using the -r pyocd option with West. pyOCD is installed when you complete the Get Zephyr and install Python dependencies step in the Getting Started Guide. The runners supported by NXP are LinkServer and JLink. pyOCD is another potential option, but NXP does not test or support the pyOCD runner.

Configuring a Console

We will use the on-board debugger microcontroller as a usb-to-serial adapter for the serial console. The following jumper settings are default on these boards, and are required to connect the UART signals to the USB bridge circuit:

• MIMXRT1170-EVKB: JP2 open (default)

• MIMXRT1170-EVK: J31 and J32 shorted (default)

Connect a USB cable from your PC to the on-board debugger USB port:

• MIMXRT1170-EVKB: J86

• MIMXRT1170-EVK: J11

Use the following settings with your serial terminal of choice (minicom, putty, etc.):

• Speed: 115200

• Data: 8 bits

• Parity: None

• Stop bits: 1

Flashing

Here is an example for the Hello World application.

Before powering the board, make sure SW1 is set to 0001b

# From the root of the zephyr repository
west build -b mimxrt1170_evk/mimxrt1176/cm7 samples/hello_world
west flash

Power off the board, and change SW1 to 0010b. Then power on the board and open a serial terminal, reset the board (press the SW4 button), and you should see the following message in the terminal:

***** Booting Zephyr OS v3.4.0-xxxx-xxxxxxxxxxxxx *****
Hello World! mimxrt1170_evk

Debugging

Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b mimxrt1170_evk/mimxrt1176/cm7 samples/hello_world
west debug

Open a serial terminal, step through the application in your debugger, and you should see the following message in the terminal:

***** Booting Zephyr OS v3.4.0-xxxx-xxxxxxxxxxxxx *****
Hello World! mimxrt1170_evk

ENET1G Driver

Current default of ethernet driver is to use 100M Ethernet instance ENET. To use the 1G Ethernet instance ENET1G, include the overlay to west build with the option -DEXTRA_DTC_OVERLAY_FILE=nxp,enet1g.overlay instead.

Support Resources for Zephyr

• NXP Zephyr Downstream Software Development Kit

• MCUXpresso for VS Code, wiki documentation and Zephyr lab guides

• NXP Zephyr Knowledge Hub

• NXP’s Zephyr landing page (including training resources)

• NXP Support Community forum for Zephyr