nxp,mcux-xbar

Description

NXP MCUX XBAR (Crossbar Switch).

Acts as a generic mux controller: each SEL register selects one input
signal to route to one output line. The driver writes the SEL registers
directly via DEVICE_MMIO and supports both 16-bit and 32-bit register
layouts (selected at compile time by FSL_FEATURE_XBAR_DSC_REG_WIDTH).

Cell layout (mux-controls / mux-states):
  cell[0] = "output" -- xbar output signal id (the SEL register that
                        will be programmed; addressing).
  state              -- xbar input signal id (the value to write into
                        the SEL register). For mux-states the trailing
                        cell is named "input" and carries this value.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

#mux-control-cells

int

Number of cells in a "mux-controls" specifier. These cells form the
addressing portion only (which output line) and do NOT include the
target state value. Drivers receive the addressing cells in the
"cells" field of struct mux_control.

This property is required.

Constant value: 1

#mux-state-cells

int

Number of cells in a "mux-states" specifier. Equals
#mux-control-cells + 1: the trailing cell carries the default state
value. Backends may name the trailing cell whatever best describes
the hardware (e.g. "state" for a generic mux, "input" for an
XBAR, "source" for a TRGMUX).

This property is required.

Constant value: 2

Specifier cell names

  • mux-control cells: output

  • mux-state cells: output, input