nxp,imx-csi
Vendor: NXP Semiconductors
Note
An implementation of a driver matching this compatible is available in drivers/video/video_mcux_csi.c.
Description
NXP MCUX CMOS sensor interface
Properties
Top level properties
These property descriptions apply to “nxp,imx-csi” nodes themselves. This page also describes child node properties in the following sections.
Properties not inherited from the base binding file.
Name |
Type |
Details |
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Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.
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Pin configuration/s for the second state. See pinctrl-0.
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Pin configuration/s for the third state. See pinctrl-0.
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Pin configuration/s for the fourth state. See pinctrl-0.
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Pin configuration/s for the fifth state. See pinctrl-0.
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Names for the provided states. The number of names needs to match the
number of states.
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “nxp,imx-csi” compatible.
Name |
Type |
Details |
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interrupts for device
This property is required. See Important properties for more information. |
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indicates the operational status of a device
Legal values: See Important properties for more information. |
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compatible strings
This property is required. See Important properties for more information. |
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register space
See Important properties for more information. |
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name of each register space
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extended interrupt specifier for device
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name of each interrupt
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phandle to interrupt controller node
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Human readable string describing the device (used as device_get_binding() argument)
See Important properties for more information. This property is deprecated. |
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Clock gate information
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name of each clock
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number of address cells in reg property
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number of size cells in reg property
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DMA channels specifiers
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Provided names of DMA channel specifiers
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IO channels specifiers
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Provided names of IO channel specifiers
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mailbox / IPM channels specifiers
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Provided names of mailbox / IPM channel specifiers
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Power domain specifiers
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Provided names of power domain specifiers
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Number of cells in power-domains property
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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Grandchild node properties
Name |
Type |
Details |
|---|---|---|
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Label of the 'remote-endpoint' subnode that interfaces with this endpoint.
This property is used as a 'work-around' to be able to declare the remote
endpoint and should be replaced by a "remote-endpoint" phandle property when
Zephyr devicetree supports circular dependency in the future.
This property is required. |
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Data bus type.
Legal values: |
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On parallel data busses, if bus-width is used to specify the number of
data lines, data-shift can be used to specify which data lines are used,
e.g. "bus-width=<8>; data-shift=<2>;" means, that lines 9:2 are used.
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Active state of the HSYNC signal
Legal values: |
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Active state of the VSYNC signal.
Legal values: |
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Sample data on falling, rising or both edges of the pixel clock signal.
Legal values: |
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Allowed data bus frequencies. For MIPI CSI-2, for instance, this is the
actual frequency of the bus, not bits per clock per lane value.
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Physical clock lane index. Position of an entry determines the logical
lane number, while the value of an entry indicates physical lane, e.g. for
a MIPI CSI-2 bus we could have "clock-lane = <0>;", which places the
clock lane on hardware lane 0. This property is valid for serial busses
only (e.g. MIPI CSI-2).
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An array of physical data lane indexes. Position of an entry determines
the logical lane number, while the value of an entry indicates physical
lane, e.g. for 2-lane MIPI CSI-2 bus we could have "data-lanes = <1 2>;",
assuming the clock lane is on hardware lane 0. If the hardware does not
support lane reordering, monotonically incremented values shall be used
from 0 or 1 onwards, depending on whether or not there is also a clock
lane. This property is valid for serial busses only (e.g. MIPI CSI-2).
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Number of data lines actively used, only valid for parallel busses.
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