DART-MX93

Overview

The DART-MX93 offers a high-performance processing for a low-power System-on-Module. The product is based on the i.MX 93 family which represents NXP’s latest power-optimized processors for smart home, building control, contactless HMI, IoT edge, and Industrial applications.

The i.MX 93 includes powerful dual Arm® Cortex®-A55 processors with speeds up to 1.7 GHz integrated with a NPU that accelerates machine learning inference. A general-purpose Arm® Cortex®-M33 running up to 250 MHz is for real-time and low-power processing. Robust control networks are possible via CAN-FD interface. Also, dual 1 Gbps Ethernet controllers, one supporting Time Sensitive Networking (TSN), drive gateway applications with low latency.

Zephyr OS is ported to run on either the Cortex®-A55 or the Cortex®-M33.

Specs Summary

  • CPU

    • NXP i.MX 93:

    • 2x Cortex®-A55 @ 1.7GHz

    • 1x Cortex®-M33 @ 250 MHz

    • 1x Ethos-U65 microNPU 0.5 TOPS

  • Memory

    • Up to 2GB LPDDR4 RAM

  • GPU

    • PXP 2D Pixel acceleration engine

  • NPU (Neural Processing Unit)

    • Neural Network performance (256 MACs operating up to 1.0 GHz and 2 OPS/MAC)

    • NPU targets 8-bit and 16-bit integer RNN

    • Handles 8-bit weights

  • Display

    • LVDS up to 1366x768p60 or 1280x800p60

    • Parallel RGB up to 1366x768p60 or 1280x800p60

    • 1x MIPI DSI up to 1920x1200p60 24-bit

  • Network

    • 2x 10/100/1000 Mbit/s Ethernet Interface

    • Certified Wi-Fi 802.11ax/ac/a/b/g/n

    • Bluetooth/BLE 5.4

  • Camera

    • One 2-lane MIPI CSI-2 camera input

  • Audio

    • Headphones

    • Microphone: Digital, Analog (stereo)

    • 3x I2S(SAI), S/PDIF, PDM 4CH

  • USB

    • 2x USB 2.0 OTG

  • Serial interfaces

    • SPI: x7

    • I2C: x7

    • UART: x7, up to 5 Mbps

    • CAN: x2

  • Temperature range

    • -40°C to 85°C

More information about the SoM can be found at the Variscite Wiki and Variscite website.

Supported Features

The imx93_var_dart board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
imx93_var_dart
/

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-A55 CPU1 1

arm,cortex-a55

CAN

on-chip

NXP FlexCAN CANFD controller2

nxp,flexcan-fd

Clock control

on-chip

i.MX CCM Rev2 (Clock Controller Module) IP node1

nxp,imx-ccm-rev2

Counter

on-chip

NXP Timer/PWM Module (TPM) used as timer6

nxp,tpm-timer

DAI

on-chip

NXP Synchronous Audio Interface (SAI)1

nxp,dai-sai

DMA

on-chip

NXP enhanced Direct Memory Access (eDMA)1

nxp,edma

Ethernet

on-chip

NXP ENET1G IP Module1

nxp,enet1g

on-chip

NXP ENET MAC/L2 Device1

nxp,enet-mac

on-chip

NXP ENET PTP (Precision Time Protocol) Clock1

nxp,enet-ptp-clock

GPIO & Headers

on-chip

i.MX RGPIO4

nxp,imx-rgpio

I2C

on-chip

NXP LPI2C controller8

nxp,lpi2c

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

ARM Generic Interrupt Controller v31

arm,gic-v3

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

MDIO

on-chip

NXP ENET MDIO Features1

nxp,enet-mdio

Pin control

on-chip

This compatible binding should be applied to the device’s iomuxc DTS node1

nxp,imx-iomuxc

on-chip

The node has the ‘pinctrl’ node label set in MCUX SoC’s devicetree1

nxp,imx93-pinctrl

Power management CPU operations

on-chip

Power State Coordination Interface (PSCI) version 1.11

arm,psci-1.1

SDHC

on-chip

NXP imx USDHC controller2

nxp,imx-usdhc

Serial controller

on-chip

NXP LPUART1 2

nxp,lpuart

SPI

on-chip

NXP LPSPI controller8

nxp,lpspi

Timer

on-chip

per-core ARM architected timer1

arm,armv8-timer

Note

It is recommended to disable peripherals used by the M33 core on the Linux host.

Devices

System Clock

This board configuration uses a system clock frequency of 24 MHz. Cortex-A55 Core runs up to 1.7 GHz. Cortex-M33 Core runs up to 200MHz in which SYSTICK runs on same frequency.

Serial Port

This board configuration uses a single serial communication channel with the CPU’s UART7 for A55 core and M33 core.

Programming and Debugging (A55)

Copy the compiled zephyr.bin to the boot directory of the SD card and plug the SD card into the board. Power it up and stop the U-Boot execution at prompt.

Use U-Boot to load and run zephyr.bin on the Cortex-A55:

load mmc $mmcdev:$mmcpart $loadaddr /boot/zephyr.bin
dcache off; icache flush; go $loadaddr

Use this configuration to run basic Zephyr applications and kernel tests, for example, with the Hello World sample:

# From the root of the zephyr repository
west build -b imx93_var_dart/mimx9352/a55 samples/hello_world

This will build an image with the hello_world sample app. When loaded and executed it will display the following ram console output:

*** Booting Zephyr OS build v4.0.0-44-g93cbaccbbc41 ***
Hello World! imx93_var_dart/mimx9352/a55

Programming and Debugging (M33)

The imx93_var_dart board supports the runners and associated west commands listed below.

flash debug rtt debugserver attach
jlink ✅ (default) ✅ (default) ✅ ✅ ✅

There are two methods to load M33 Core images: U-Boot command and Linux remoteproc.

Load and Run M33 Zephyr Image from U-Boot

Load and run Zephyr on M33 from A55 using U-Boot by copying the compiled zephyr.bin to the boot directory of the SD card and plug the SD card into the board. Power it up and stop the U-Boot execution at prompt.

Load the M33 binary onto the desired memory and start its execution using:

load mmc $mmcdev:$mmcpart 0x80000000 /boot/zephyr.bin
cp.b 0x80000000 0x201e0000 0x30000
bootaux 0x1ffe0000 0

Load and Run M33 Zephyr Image by using Linux remoteproc

Transfer built binaries zephyr.bin and zephyr.elf to the SoM’s /boot and /lib/firmware respectively using scp or through an USB drive.

Before running Cortex-M33 binaries from Linux it is necessary to enable the device tree dedicated to be used with Cortex-M33 applications:

root@imx93-var-som:~# fw_setenv fdt_file imx93-var-dart-dt8mcustomboard-m33.dtb
root@imx93-var-som:~# reboot

It is possible to execute Zephyr binaries using Variscite remoteproc scripts made for MCUXpresso binaries:

root@imx93-var-som:~# /etc/remoteproc/variscite-rproc-linux -f /lib/firmware/zephyr.elf
[  125.449838] remoteproc remoteproc0: powering up imx-rproc
[  125.459162] remoteproc remoteproc0: Booting fw image zephyr.elf, size 469356
[  125.468958] remoteproc remoteproc0: No resource table in elf
[  125.987142] remoteproc remoteproc0: remote processor imx-rproc is now up

Which should yield the following result on the UART7 serial console:

*** Booting Zephyr OS build v4.0.0-44-g93cbaccbbc41 ***
Hello World! imx93_var_dart/mimx9352/m33

You can also configure U-Boot to load firmware on boot:

root@imx93-var-som:~# /etc/remoteproc/variscite-rproc-u-boot -f /boot/zephyr.bin
Configuring for TCM memory
+ fw_setenv m33_addr 0x201E0000
+ fw_setenv fdt_file imx93-var-dart-dt8mcustomboard-m33.dtb
+ fw_setenv use_m33 yes
+ fw_setenv m33_bin zephyr.bin

Finished: Please reboot, the m33 firmware will run during U-Boot

For more information about Variscite remoteproc scripts and general Cortex-M33 support, visit Variscite Wiki.

References