GD32VF103V-EVAL

Board Overview

GD32VF103V-EVAL

Name:

gd32vf103v_eval

Vendor:

GigaDevice Semiconductor

Architecture:

riscv

SoC:

gd32vf103

Browse board sources

Overview

The GD32V103V-EVAL board is a hardware platform that enables prototyping on GD32VF103VB RISC-V MCU.

The GD32VF103VB features a single-core RISC-V 32-bit MCU which can run up to 108 MHz with flash accesses zero wait states, 128 KiB of Flash, 32 KiB of SRAM and 80 GPIOs.

Hardware

• GD32VF103VBT6 MCU

• AT24C02C 2Kb EEPROM

• GD25Q16 16Mbit SPI and QSPI NOR Flash

• 4 x User LEDs

• 1 x Joystick (L/R/U/D/C)

• 2 x USART (RS-232 at J1/J2 connectors)

• 1 x POT connected to an ADC input

• USB FS connector

• Headphone interface

• 1 x CAN

• 3.2” RGB-LCD (320x240)

• GD-Link on board programmer

• J-Link/JTAG connector

For more information about the GD32VF103 SoC and GD32VF103V-EVAL board:

• GigaDevice RISC-V Mainstream SoC Website

• GD32VF103 Datasheet

• GD32VF103 User Manual

• GD32VF103V-EVAL Documents

Supported Features

The gd32vf103v_eval board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

gd32vf103v_eval

/

gd32vf103

gd32vf103v_eval@/gd32vf103 target

Type	Location	Description	Compatible
CPU	on-chip	Nuclei Bumblebee RISC-V Core1	nuclei,bumblebee
ADC	on-chip	GigaDevice GD32 ADC1 1	gd,gd32-adc
Clock control	on-chip	Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1	gd,gd32-cctl
Counter	on-chip	GigaDevice GD32 timer1 6	gd,gd32-timer
DAC	on-chip	GigaDevice GD32 series DAC module1	gd,gd32-dac
DMA	on-chip	GD32 DMA controller2	gd,gd32-dma
Flash controller	on-chip	There are three types GD32 FMC1	gd,gd32-flash-controller
GPIO & Headers	on-chip	GD32 GPIO4 1	gd,gd32-gpio
I2C	on-chip	GigiDevice GD32 I2C1	gd,gd32-i2c
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	Nuclei ECLIC interrupt controller1	nuclei,eclic
	on-chip	GigaDevice External Interrupt Controller1	gd,gd32-exti
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
	on-board	Group of PWM-controlled LEDs1	pwm-leds
Multi-Function Device	on-chip	Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1	gd,gd32-rcu
MTD	on-chip	Flash memory binding of GD32 FMC v11	gd,gd32-nv-flash-v1
	on-board	Properties supporting Zephyr spi-nor flash driver (over the Zephyr SPI API) control of serial flash memories using the standard M25P80-based command set1	jedec,spi-nor
Pin control	on-chip	The AFIO peripheral is used to configure pin remapping, EXTI sources and, when available, enable the I/O compensation cell1	gd,gd32-afio
	on-chip	The GD32 pin controller (AFIO model) is a singleton node responsible for controlling pin function selection and pin properties1	gd,gd32-pinctrl-afio
PWM	on-chip	GigaDevice GD32 PWM1 4	gd,gd32-pwm
Reset controller	on-chip	Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1	gd,gd32-rctl
Serial controller	on-chip	GigaDevice USART2 3	gd,gd32-usart
SPI	on-chip	GigaDevice GD32 SPI1 1	gd,gd32-spi
SRAM	on-chip	Generic on-chip SRAM1	mmio-sram
Timer	on-chip	Nuclei System Timer1	nuclei,systimer
Watchdog	on-chip	GD32 free watchdog timer1	gd,gd32-fwdgt
	on-chip	GD32 window watchdog timer1	gd,gd32-wwdgt

Serial Port

The GD32VF103V-EVAL board has two serial communications port. The default port is USART0 with TX connected at PA9 and RX at PA10.

Programming and Debugging

The gd32vf103v_eval board supports the runners and associated west commands listed below.

	flash	debug	debugserver	rtt	attach
jlink	✅	✅	✅	✅	✅
openocd	✅ (default)	✅ (default)	✅	✅	✅

Before programming your board make sure to configure boot and serial jumpers as follows:

• JP2/3: Select 2-3 for both (boot from user memory)

• JP5/6: Select 1-2 positions (labeled as USART0)

Using GD-Link

The GD32VF103V-EVAL includes an onboard programmer/debugger (GD-Link) which allows flash programming and debugging over USB. There is also a JTAG header (JP1) which can be used with tools like Segger J-Link.

1. Build the Zephyr kernel and the Hello World sample application:

   west build -b gd32vf103v_eval samples/hello_world
   

2. Run your favorite terminal program to listen for output. On Linux the terminal should be something like /dev/ttyUSB0. For example:

   minicom -D /dev/ttyUSB0 -o
   

   The -o option tells minicom not to send the modem initialization string. Connection should be configured as follows:

   • Speed: 115200

   • Data: 8 bits

   • Parity: None

   • Stop bits: 1

3. To flash an image:

   west build -b gd32vf103v_eval samples/hello_world
   west flash
   

   You should see “Hello World! gd32vf103v_eval” in your terminal.

4. To debug an image:

   west build -b gd32vf103v_eval samples/hello_world
   west debug