GD32F470I-EVAL

Overview

The GD32F470I-EVAL board is a hardware platform that enables prototyping on GD32F470IK Cortex-M4F Stretch Performance MCU.

The GD32F470IK features a single-core ARM Cortex-M4F MCU which can run up to 240 MHz with flash accesses zero wait states, 3072kiB of Flash, 256kiB of SRAM and 140 GPIOs.

Hardware

  • GD32F470IKH6 MCU

  • 2Kb EEPROM

  • 16Mbit SPI and QSPI NOR Flash

  • 256Mbit SDRAM

  • 3 x User LEDs

  • 3 x User Push buttons

  • 1 x USART (RS-232 at J1 connector)

  • 1 x POT connected to an ADC input

  • Headphone interface

  • Micro SD Card Interface

  • USB FS connector

  • USB HS connector

  • 1 x CAN

  • Ethernet Interface

  • 4.3” LCD (480x272)

  • OV2640 Digital Camera

  • GD-Link on board programmer

  • J-Link/JTAG connector

For more information about the GD32F470 SoC and GD32F470I-EVAL board:

Supported Features

The gd32f470i_eval board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
gd32f470i_eval
/
gd32f470

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M4F CPU1

arm,cortex-m4f

ADC

on-chip

GigaDevice GD32 ADC3

gd,gd32-adc

Clock control

on-chip

Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1

gd,gd32-cctl

Counter

on-chip

GigaDevice GD32 timer1 13

gd,gd32-timer

DAC

on-chip

GigaDevice GD32 series DAC module1

gd,gd32-dac

DMA

on-chip

GD32 DMA controller with FIFO2

gd,gd32-dma-v1

Flash controller

on-chip

There are three types GD32 FMC1

gd,gd32-flash-controller

GPIO & Headers

on-chip

GD32 GPIO7 2

gd,gd32-gpio

I2C

on-chip

GigiDevice GD32 I2C1 2

gd,gd32-i2c

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

ARMv7-M NVIC (Nested Vectored Interrupt Controller)1

arm,v7m-nvic

on-chip

GigaDevice External Interrupt Controller1

gd,gd32-exti

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

on-board

Group of PWM-controlled LEDs1

pwm-leds

Multi-Function Device

on-chip

Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1

gd,gd32-rcu

Miscellaneous

on-chip

GigaDevice GD32 System Configuration Registers1

gd,gd32-syscfg

MMU / MPU

on-chip

ARMv7-M Memory Protection Unit (MPU)1

arm,armv7m-mpu

MTD

on-chip

Flash memory binding of GD32 FMC v31

gd,gd32-nv-flash-v3

on-board

I2C EEPROMs compatible with Atmel’s AT24 family1

atmel,at24

on-board

Properties supporting Zephyr spi-nor flash driver (over the Zephyr SPI API) control of serial flash memories using the standard M25P80-based command set1

jedec,spi-nor

Pin control

on-chip

The GD32 pin controller (AF model) is a singleton node responsible for controlling pin function selection and pin properties1

gd,gd32-pinctrl-af

PWM

on-chip

GigaDevice GD32 PWM1 11

gd,gd32-pwm

Reset controller

on-chip

Gigadevice Reset and Clock Unit (RCU) if a multi-function peripheral in charge of reset control (RCTL) and clock control (CCTL) for all SoC peripherals1

gd,gd32-rctl

Serial controller

on-chip

GigaDevice USART1 7

gd,gd32-usart

SPI

on-chip

GigaDevice GD32 SPI1 5

gd,gd32-spi

SRAM

on-chip

Generic on-chip SRAM1

mmio-sram

Timer

on-chip

ARMv7-M System Tick1

arm,armv7m-systick

Watchdog

on-chip

GD32 free watchdog timer1

gd,gd32-fwdgt

on-chip

GD32 window watchdog timer1

gd,gd32-wwdgt

Serial Port

The GD32F470I-EVAL board has one serial communication port. The default port is USART0 with TX connected at PA9 and RX at PA10.

Programming and Debugging

The gd32f470i_eval board supports the runners and associated west commands listed below.

flash debug rtt debugserver attach
jlink
openocd ✅ (default) ✅ (default)

Before programming your board make sure to configure boot and serial jumpers as follows:

  • J2/3: Select 2-3 for both (boot from user memory)

  • J5: Select 1-2 position (labeled as USART0)