Zephyr API Documentation 4.2.99
A Scalable Open Source RTOS
 4.2.99
stm32-pinctrl.h File Reference

Go to the source code of this file.

Macros

#define STM32_AF0   0x0
 Pin modes.
#define STM32_AF1   0x1
#define STM32_AF2   0x2
#define STM32_AF3   0x3
#define STM32_AF4   0x4
#define STM32_AF5   0x5
#define STM32_AF6   0x6
#define STM32_AF7   0x7
#define STM32_AF8   0x8
#define STM32_AF9   0x9
#define STM32_AF10   0xa
#define STM32_AF11   0xb
#define STM32_AF12   0xc
#define STM32_AF13   0xd
#define STM32_AF14   0xe
#define STM32_AF15   0xf
#define STM32_ANALOG   0x10
#define STM32_GPIO   0x11
#define STM32_MODE_SHIFT   0U
 Macro to generate pinmux int using port, pin number and mode arguments This is inspired from Linux equivalent st,stm32f429-pinctrl binding.
#define STM32_MODE_MASK   0x1FU
#define STM32_LINE_SHIFT   5U
#define STM32_LINE_MASK   0xFU
#define STM32_PORT_SHIFT   9U
#define STM32_PORT_MASK   0x1FU
#define STM32_PINMUX(port, line, mode)
 Pin configuration configuration bit field.
#define STM32_MODER_INPUT_MODE   (0x0 << STM32_MODER_SHIFT)
 PIN configuration bitfield.
#define STM32_MODER_OUTPUT_MODE   (0x1 << STM32_MODER_SHIFT)
#define STM32_MODER_ALT_MODE   (0x2 << STM32_MODER_SHIFT)
#define STM32_MODER_ANALOG_MODE   (0x3 << STM32_MODER_SHIFT)
#define STM32_MODER_MASK   0x3
#define STM32_MODER_SHIFT   4
#define STM32_OTYPER_PUSH_PULL   (0x0 << STM32_OTYPER_SHIFT)
#define STM32_OTYPER_OPEN_DRAIN   (0x1 << STM32_OTYPER_SHIFT)
#define STM32_OTYPER_MASK   0x1
#define STM32_OTYPER_SHIFT   6
#define STM32_OSPEEDR_LOW_SPEED   (0x0 << STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_MEDIUM_SPEED   (0x1 << STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_HIGH_SPEED   (0x2 << STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_VERY_HIGH_SPEED   (0x3 << STM32_OSPEEDR_SHIFT)
#define STM32_OSPEEDR_MASK   0x3
#define STM32_OSPEEDR_SHIFT   7
#define STM32_PUPDR_NO_PULL   (0x0 << STM32_PUPDR_SHIFT)
#define STM32_PUPDR_PULL_UP   (0x1 << STM32_PUPDR_SHIFT)
#define STM32_PUPDR_PULL_DOWN   (0x2 << STM32_PUPDR_SHIFT)
#define STM32_PUPDR_MASK   0x3
#define STM32_PUPDR_SHIFT   9
#define STM32_ODR_0   (0x0 << STM32_ODR_SHIFT)
#define STM32_ODR_1   (0x1 << STM32_ODR_SHIFT)
#define STM32_ODR_MASK   0x1
#define STM32_ODR_SHIFT   11
#define STM32_IODELAY_LENGTH_MASK   0xFU
#define STM32_IODELAY_LENGTH_SHIFT   12
#define STM32_IORETIME_ADVCFGR_MASK   0xFU
#define STM32_IORETIME_ADVCFGR_SHIFT   16
#define STM32_IODELAY_DIRECTION_SHIFT   STM32_IORETIME_ADVCFGR_SHIFT
#define STM32_IORETIME_EDGE_SHIFT   17
#define STM32_IORETIME_ENABLE_SHIFT   19

Macro Definition Documentation

◆ STM32_AF0

#define STM32_AF0   0x0

Pin modes.

◆ STM32_AF1

#define STM32_AF1   0x1

◆ STM32_AF10

#define STM32_AF10   0xa

◆ STM32_AF11

#define STM32_AF11   0xb

◆ STM32_AF12

#define STM32_AF12   0xc

◆ STM32_AF13

#define STM32_AF13   0xd

◆ STM32_AF14

#define STM32_AF14   0xe

◆ STM32_AF15

#define STM32_AF15   0xf

◆ STM32_AF2

#define STM32_AF2   0x2

◆ STM32_AF3

#define STM32_AF3   0x3

◆ STM32_AF4

#define STM32_AF4   0x4

◆ STM32_AF5

#define STM32_AF5   0x5

◆ STM32_AF6

#define STM32_AF6   0x6

◆ STM32_AF7

#define STM32_AF7   0x7

◆ STM32_AF8

#define STM32_AF8   0x8

◆ STM32_AF9

#define STM32_AF9   0x9

◆ STM32_ANALOG

#define STM32_ANALOG   0x10

◆ STM32_GPIO

#define STM32_GPIO   0x11

◆ STM32_IODELAY_DIRECTION_SHIFT

#define STM32_IODELAY_DIRECTION_SHIFT   STM32_IORETIME_ADVCFGR_SHIFT

◆ STM32_IODELAY_LENGTH_MASK

#define STM32_IODELAY_LENGTH_MASK   0xFU

◆ STM32_IODELAY_LENGTH_SHIFT

#define STM32_IODELAY_LENGTH_SHIFT   12

◆ STM32_IORETIME_ADVCFGR_MASK

#define STM32_IORETIME_ADVCFGR_MASK   0xFU

◆ STM32_IORETIME_ADVCFGR_SHIFT

#define STM32_IORETIME_ADVCFGR_SHIFT   16

◆ STM32_IORETIME_EDGE_SHIFT

#define STM32_IORETIME_EDGE_SHIFT   17

◆ STM32_IORETIME_ENABLE_SHIFT

#define STM32_IORETIME_ENABLE_SHIFT   19

◆ STM32_LINE_MASK

#define STM32_LINE_MASK   0xFU

◆ STM32_LINE_SHIFT

#define STM32_LINE_SHIFT   5U

◆ STM32_MODE_MASK

#define STM32_MODE_MASK   0x1FU

◆ STM32_MODE_SHIFT

#define STM32_MODE_SHIFT   0U

Macro to generate pinmux int using port, pin number and mode arguments This is inspired from Linux equivalent st,stm32f429-pinctrl binding.

◆ STM32_MODER_ALT_MODE

#define STM32_MODER_ALT_MODE   (0x2 << STM32_MODER_SHIFT)

◆ STM32_MODER_ANALOG_MODE

#define STM32_MODER_ANALOG_MODE   (0x3 << STM32_MODER_SHIFT)

◆ STM32_MODER_INPUT_MODE

#define STM32_MODER_INPUT_MODE   (0x0 << STM32_MODER_SHIFT)

PIN configuration bitfield.

Pin configuration is coded with the following fields [03:00] Alternate Functions [05:04] GPIO Mode [ 06] GPIO Output type [08:07] GPIO Speed [10:09] GPIO PUPD config [ 11] GPIO Output data

These fields are only used when pinctrl with compatible "st,stm32n6-pinctrl" is in use: [15:12] I/O delay length [ 16] I/O delay direction [18:17] I/O retime edge [ 19] I/O retime enable

NOTE: the values for these fields are not defined in this file because they depend on hardware definitions. The values can be found in soc/st/stm32/common/pinctrl_soc.h instead.

◆ STM32_MODER_MASK

#define STM32_MODER_MASK   0x3

◆ STM32_MODER_OUTPUT_MODE

#define STM32_MODER_OUTPUT_MODE   (0x1 << STM32_MODER_SHIFT)

◆ STM32_MODER_SHIFT

#define STM32_MODER_SHIFT   4

◆ STM32_ODR_0

#define STM32_ODR_0   (0x0 << STM32_ODR_SHIFT)

◆ STM32_ODR_1

#define STM32_ODR_1   (0x1 << STM32_ODR_SHIFT)

◆ STM32_ODR_MASK

#define STM32_ODR_MASK   0x1

◆ STM32_ODR_SHIFT

#define STM32_ODR_SHIFT   11

◆ STM32_OSPEEDR_HIGH_SPEED

#define STM32_OSPEEDR_HIGH_SPEED   (0x2 << STM32_OSPEEDR_SHIFT)

◆ STM32_OSPEEDR_LOW_SPEED

#define STM32_OSPEEDR_LOW_SPEED   (0x0 << STM32_OSPEEDR_SHIFT)

◆ STM32_OSPEEDR_MASK

#define STM32_OSPEEDR_MASK   0x3

◆ STM32_OSPEEDR_MEDIUM_SPEED

#define STM32_OSPEEDR_MEDIUM_SPEED   (0x1 << STM32_OSPEEDR_SHIFT)

◆ STM32_OSPEEDR_SHIFT

#define STM32_OSPEEDR_SHIFT   7

◆ STM32_OSPEEDR_VERY_HIGH_SPEED

#define STM32_OSPEEDR_VERY_HIGH_SPEED   (0x3 << STM32_OSPEEDR_SHIFT)

◆ STM32_OTYPER_MASK

#define STM32_OTYPER_MASK   0x1

◆ STM32_OTYPER_OPEN_DRAIN

#define STM32_OTYPER_OPEN_DRAIN   (0x1 << STM32_OTYPER_SHIFT)

◆ STM32_OTYPER_PUSH_PULL

#define STM32_OTYPER_PUSH_PULL   (0x0 << STM32_OTYPER_SHIFT)

◆ STM32_OTYPER_SHIFT

#define STM32_OTYPER_SHIFT   6

◆ STM32_PINMUX

#define STM32_PINMUX ( port,
line,
mode )
Value:
(((((port) - 'A') & STM32_PORT_MASK) << STM32_PORT_SHIFT) | \
(((line) & STM32_LINE_MASK) << STM32_LINE_SHIFT) | \
(((STM32_ ## mode) & STM32_MODE_MASK) << STM32_MODE_SHIFT))
#define STM32_PORT_SHIFT
Definition stm32-pinctrl.h:46
#define STM32_MODE_MASK
Definition stm32-pinctrl.h:43
#define STM32_MODE_SHIFT
Macro to generate pinmux int using port, pin number and mode arguments This is inspired from Linux eq...
Definition stm32-pinctrl.h:42
#define STM32_LINE_MASK
Definition stm32-pinctrl.h:45
#define STM32_LINE_SHIFT
Definition stm32-pinctrl.h:44
#define STM32_PORT_MASK
Definition stm32-pinctrl.h:47

Pin configuration configuration bit field.

Fields:

  • mode [ 0 : 4 ]
  • line [ 5 : 8 ]
  • port [ 9 : 13 ]
Parameters
portPort ('A'..'Q')
linePin (0..15)
modeMode (ANALOG, GPIO_IN, ALTERNATE).

◆ STM32_PORT_MASK

#define STM32_PORT_MASK   0x1FU

◆ STM32_PORT_SHIFT

#define STM32_PORT_SHIFT   9U

◆ STM32_PUPDR_MASK

#define STM32_PUPDR_MASK   0x3

◆ STM32_PUPDR_NO_PULL

#define STM32_PUPDR_NO_PULL   (0x0 << STM32_PUPDR_SHIFT)

◆ STM32_PUPDR_PULL_DOWN

#define STM32_PUPDR_PULL_DOWN   (0x2 << STM32_PUPDR_SHIFT)

◆ STM32_PUPDR_PULL_UP

#define STM32_PUPDR_PULL_UP   (0x1 << STM32_PUPDR_SHIFT)

◆ STM32_PUPDR_SHIFT

#define STM32_PUPDR_SHIFT   9