Zephyr API Documentation 4.2.0-rc3
A Scalable Open Source RTOS
 4.2.0-rc3
stm32-pinctrl.h
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1/*
2 * Copyright (c) 2017 Linaro Limited
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_STM32_PINCTRL_H_
8#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_STM32_PINCTRL_H_
9
11
12/* Adapted from Linux: include/dt-bindings/pinctrl/stm32-pinfunc.h */
13
17
18#define STM32_AF0 0x0
19#define STM32_AF1 0x1
20#define STM32_AF2 0x2
21#define STM32_AF3 0x3
22#define STM32_AF4 0x4
23#define STM32_AF5 0x5
24#define STM32_AF6 0x6
25#define STM32_AF7 0x7
26#define STM32_AF8 0x8
27#define STM32_AF9 0x9
28#define STM32_AF10 0xa
29#define STM32_AF11 0xb
30#define STM32_AF12 0xc
31#define STM32_AF13 0xd
32#define STM32_AF14 0xe
33#define STM32_AF15 0xf
34#define STM32_ANALOG 0x10
35#define STM32_GPIO 0x11
36
41
42#define STM32_MODE_SHIFT 0U
43#define STM32_MODE_MASK 0x1FU
44#define STM32_LINE_SHIFT 5U
45#define STM32_LINE_MASK 0xFU
46#define STM32_PORT_SHIFT 9U
47#define STM32_PORT_MASK 0x1FU
48
62#define STM32_PINMUX(port, line, mode) \
63 (((((port) - 'A') & STM32_PORT_MASK) << STM32_PORT_SHIFT) | \
64 (((line) & STM32_LINE_MASK) << STM32_LINE_SHIFT) | \
65 (((STM32_ ## mode) & STM32_MODE_MASK) << STM32_MODE_SHIFT))
66
90
91/* GPIO Mode */
92#define STM32_MODER_INPUT_MODE (0x0 << STM32_MODER_SHIFT)
93#define STM32_MODER_OUTPUT_MODE (0x1 << STM32_MODER_SHIFT)
94#define STM32_MODER_ALT_MODE (0x2 << STM32_MODER_SHIFT)
95#define STM32_MODER_ANALOG_MODE (0x3 << STM32_MODER_SHIFT)
96#define STM32_MODER_MASK 0x3
97#define STM32_MODER_SHIFT 4
98
99/* GPIO Output type */
100#define STM32_OTYPER_PUSH_PULL (0x0 << STM32_OTYPER_SHIFT)
101#define STM32_OTYPER_OPEN_DRAIN (0x1 << STM32_OTYPER_SHIFT)
102#define STM32_OTYPER_MASK 0x1
103#define STM32_OTYPER_SHIFT 6
104
105/* GPIO speed */
106#define STM32_OSPEEDR_LOW_SPEED (0x0 << STM32_OSPEEDR_SHIFT)
107#define STM32_OSPEEDR_MEDIUM_SPEED (0x1 << STM32_OSPEEDR_SHIFT)
108#define STM32_OSPEEDR_HIGH_SPEED (0x2 << STM32_OSPEEDR_SHIFT)
109#define STM32_OSPEEDR_VERY_HIGH_SPEED (0x3 << STM32_OSPEEDR_SHIFT)
110#define STM32_OSPEEDR_MASK 0x3
111#define STM32_OSPEEDR_SHIFT 7
112
113/* GPIO High impedance/Pull-up/pull-down */
114#define STM32_PUPDR_NO_PULL (0x0 << STM32_PUPDR_SHIFT)
115#define STM32_PUPDR_PULL_UP (0x1 << STM32_PUPDR_SHIFT)
116#define STM32_PUPDR_PULL_DOWN (0x2 << STM32_PUPDR_SHIFT)
117#define STM32_PUPDR_MASK 0x3
118#define STM32_PUPDR_SHIFT 9
119
120/* GPIO plain output value */
121#define STM32_ODR_0 (0x0 << STM32_ODR_SHIFT)
122#define STM32_ODR_1 (0x1 << STM32_ODR_SHIFT)
123#define STM32_ODR_MASK 0x1
124#define STM32_ODR_SHIFT 11
125
126/* I/O delay length (DELAYR) */
127#define STM32_IODELAY_LENGTH_MASK 0xFU
128#define STM32_IODELAY_LENGTH_SHIFT 12
129
130/* I/O delay & retime configuration (ADVCFGR) */
131#define STM32_IORETIME_ADVCFGR_MASK 0xFU
132#define STM32_IORETIME_ADVCFGR_SHIFT 16
133
134#define STM32_IODELAY_DIRECTION_SHIFT STM32_IORETIME_ADVCFGR_SHIFT
135#define STM32_IORETIME_EDGE_SHIFT 17
136#define STM32_IORETIME_ENABLE_SHIFT 19
137
138#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_STM32_PINCTRL_H_ */