renesas-rztn-gpio.h File Reference

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Macros
#define	RZTN_GPIO_DRCTL_SHIFT   8U
	RZTN specific GPIO Flags The pin driving ability flags are encoded in the 8 upper bits of gpio_dt_flags_t as follows:
#define	RZTN_GPIO_SCHMITT_TRIG_SHIFT   4U
#define	RZTN_GPIO_SLEW_RATE_SHIFT   5U
#define	RZTN_GPIO_DRCTL_SET(drive_ability, schmitt_trig, slew_rate)

Macro Definition Documentation

RZTN_GPIO_DRCTL_SET

#define RZTN_GPIO_DRCTL_SET	(		drive_ability,
			schmitt_trig,
			slew_rate )

Value:

        (((drive_ability) | ((schmitt_trig) << RZTN_GPIO_SCHMITT_TRIG_SHIFT) |                     \
          ((slew_rate) << RZTN_GPIO_SLEW_RATE_SHIFT))                                              \
         << RZTN_GPIO_DRCTL_SHIFT)

RZTN_GPIO_DRCTL_SHIFT

#define RZTN_GPIO_DRCTL_SHIFT   8U

RZTN specific GPIO Flags The pin driving ability flags are encoded in the 8 upper bits of gpio_dt_flags_t as follows:

• Bit 9..8: Driving ability control
• Bit 12: Schmitt trigger control
• Bit 13: Slew rate control Example: Driving ability control: Middle Schmitt trigger control: Enabled Slew rate control: Slow gpio-consumer { out-gpios = <&port8 2 (GPIO_PULL_UP | RZTN_GPIO_CFG_SET(1, 1, 0))>; };

RZTN_GPIO_SCHMITT_TRIG_SHIFT

#define RZTN_GPIO_SCHMITT_TRIG_SHIFT   4U

RZTN_GPIO_SLEW_RATE_SHIFT

#define RZTN_GPIO_SLEW_RATE_SHIFT   5U