intc_bcm283x.h File Reference

BCM283x interrupt-controller driver API. More...

#include <stdint.h>

Go to the source code of this file.

Macros
#define	BCM283X_ARMC_IRQ_BASE   32U
	First Zephyr IRQ number routed to the BCM2835 ARMC peripheral aggregator.
#define	BCM283X_ARMC_IRQ_LIMIT   (BCM283X_ARMC_IRQ_BASE + 96U)
	One past the last ARMC IRQ in the Zephyr IRQ space.
#define	BCM283X_IRQ_IS_L1(irq)
	True when irq falls in the BCM2836 ARM-local intc range (0..9).
#define	BCM283X_IRQ_IS_ARMC(irq)
	True when irq falls in the BCM2835 ARMC peripheral range (32..127).
#define	BCM2836_L1_IRQ_GPU_BIT   8U
	L1 IRQ_SOURCE bit position for the GPU cascade.
#define	BCM2836_L1_IRQ_PMU_BIT   9U
	L1 IRQ_SOURCE bit position for the per-core PMU IRQ.

Functions
void	bcm2836_l1_intc_init (void)
	Initialise the BCM2836 ARM-local interrupt controller.
void	bcm2836_l1_intc_irq_enable (unsigned int irq)
	Enable an L1 IRQ source.
void	bcm2836_l1_intc_irq_disable (unsigned int irq)
	Disable an L1 IRQ source.
int	bcm2836_l1_intc_irq_is_enabled (unsigned int irq)
	Query whether an L1 IRQ source is currently enabled.
unsigned int	bcm2836_l1_intc_irq_get_active (void)
	Decode the firing L1 IRQ.
void	bcm2835_armctrl_ic_init (void)
	Initialise the BCM2835 ARMC peripheral interrupt controller.
void	bcm2835_armctrl_ic_irq_enable (unsigned int irq)
	Enable an ARMC peripheral IRQ source.
void	bcm2835_armctrl_ic_irq_disable (unsigned int irq)
	Disable an ARMC peripheral IRQ source.
int	bcm2835_armctrl_ic_irq_is_enabled (unsigned int irq)
	Query whether an ARMC peripheral IRQ source is enabled.
unsigned int	bcm2835_armctrl_ic_irq_get_active (void)
	Decode the firing ARMC peripheral IRQ.

Detailed Description

BCM283x interrupt-controller driver API.

Two physical controllers back a single flat Zephyr IRQ space on BCM2710 (Pi 2 / Pi 3 / Pi Zero 2 W):

• IRQs 0..9 – BCM2836 ARM-local intc (per-core timers, mailboxes, the GPU cascade, and the PMU). Driver: drivers/interrupt_controller/intc_bcm2836_l1.c.
• IRQs 32..127 – BCM2835 ARMC peripheral aggregator (basic bank, GPU bank 1, GPU bank 2), cascaded under L1 IRQ 8. Driver: drivers/interrupt_controller/intc_bcm2835_armctrl.c.

The SoC layer (soc/brcm/bcm2710/soc_irq.c) installs the z_soc_irq_* arch hooks under CONFIG_ARM_CUSTOM_INTERRUPT_CONTROLLER and dispatches to the two driver function families below based on which IRQ range the caller is asking about. The drivers own their own MMIO via device_map().