Zephyr API Documentation 4.0.0-rc3
A Scalable Open Source RTOS
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#include <stdint.h>
#include <zephyr/device.h>
#include <zephyr/toolchain.h>
#include <zephyr/sys/util.h>
Go to the source code of this file.
Data Structures | |
struct | i3c_ccc_target_payload |
Payload structure for Direct CCC to one target. More... | |
struct | i3c_ccc_payload |
Payload structure for one CCC transaction. More... | |
struct | i3c_ccc_events |
Payload for ENEC/DISEC CCC (Target Events Command). More... | |
struct | i3c_ccc_mwl |
Payload for SETMWL/GETMWL CCC (Set/Get Maximum Write Length). More... | |
struct | i3c_ccc_mrl |
Payload for SETMRL/GETMRL CCC (Set/Get Maximum Read Length). More... | |
struct | i3c_ccc_deftgts_active_controller |
The active controller part of payload for DEFTGTS CCC. More... | |
struct | i3c_ccc_deftgts_target |
The target device part of payload for DEFTGTS CCC. More... | |
struct | i3c_ccc_deftgts |
Payload for DEFTGTS CCC (Define List of Targets). More... | |
struct | i3c_ccc_address |
Payload for a single device address. More... | |
struct | i3c_ccc_getpid |
Payload for GETPID CCC (Get Provisioned ID). More... | |
struct | i3c_ccc_getbcr |
Payload for GETBCR CCC (Get Bus Characteristics Register). More... | |
struct | i3c_ccc_getdcr |
Payload for GETDCR CCC (Get Device Characteristics Register). More... | |
union | i3c_ccc_getstatus |
Payload for GETSTATUS CCC (Get Device Status). More... | |
struct | i3c_ccc_setbrgtgt_tgt |
One Bridged Target for SETBRGTGT payload. More... | |
struct | i3c_ccc_setbrgtgt |
Payload for SETBRGTGT CCC (Set Bridge Targets). More... | |
union | i3c_ccc_getmxds |
Payload for GETMXDS CCC (Get Max Data Speed). More... | |
union | i3c_ccc_getcaps |
Payload for GETCAPS CCC (Get Optional Feature Capabilities). More... | |
Macros | |
#define | I3C_CCC_BROADCAST_MAX_ID 0x7FU |
Maximum CCC ID for broadcast. | |
#define | I3C_CCC_ENEC(broadcast) |
Enable Events Command. | |
#define | I3C_CCC_DISEC(broadcast) |
Disable Events Command. | |
#define | I3C_CCC_ENTAS(as, broadcast) |
Enter Activity State. | |
#define | I3C_CCC_ENTAS0(broadcast) |
Enter Activity State 0. | |
#define | I3C_CCC_ENTAS1(broadcast) |
Enter Activity State 1. | |
#define | I3C_CCC_ENTAS2(broadcast) |
Enter Activity State 2. | |
#define | I3C_CCC_ENTAS3(broadcast) |
Enter Activity State 3. | |
#define | I3C_CCC_RSTDAA 0x06U |
Reset Dynamic Address Assignment (Broadcast) | |
#define | I3C_CCC_ENTDAA 0x07U |
Enter Dynamic Address Assignment (Broadcast) | |
#define | I3C_CCC_DEFTGTS 0x08U |
Define List of Targets (Broadcast) | |
#define | I3C_CCC_SETMWL(broadcast) |
Set Max Write Length (Broadcast or Direct) | |
#define | I3C_CCC_SETMRL(broadcast) |
Set Max Read Length (Broadcast or Direct) | |
#define | I3C_CCC_ENTTM 0x0BU |
Enter Test Mode (Broadcast) | |
#define | I3C_CCC_SETBUSCON 0x0CU |
Set Bus Context (Broadcast) | |
#define | I3C_CCC_ENDXFER(broadcast) |
Data Transfer Ending Procedure Control. | |
#define | I3C_CCC_ENTHDR(x) |
Enter HDR Mode (HDR-DDR) (Broadcast) | |
#define | I3C_CCC_ENTHDR0 0x20U |
Enter HDR Mode 0 (HDR-DDR) (Broadcast) | |
#define | I3C_CCC_ENTHDR1 0x21U |
Enter HDR Mode 1 (HDR-TSP) (Broadcast) | |
#define | I3C_CCC_ENTHDR2 0x22U |
Enter HDR Mode 2 (HDR-TSL) (Broadcast) | |
#define | I3C_CCC_ENTHDR3 0x23U |
Enter HDR Mode 3 (HDR-BT) (Broadcast) | |
#define | I3C_CCC_ENTHDR4 0x24U |
Enter HDR Mode 4 (Broadcast) | |
#define | I3C_CCC_ENTHDR5 0x25U |
Enter HDR Mode 5 (Broadcast) | |
#define | I3C_CCC_ENTHDR6 0x26U |
Enter HDR Mode 6 (Broadcast) | |
#define | I3C_CCC_ENTHDR7 0x27U |
Enter HDR Mode 7 (Broadcast) | |
#define | I3C_CCC_SETXTIME(broadcast) |
Exchange Timing Information (Broadcast or Direct) | |
#define | I3C_CCC_SETAASA 0x29U |
Set All Addresses to Static Addresses (Broadcast) | |
#define | I3C_CCC_RSTACT(broadcast) |
Target Reset Action. | |
#define | I3C_CCC_DEFGRPA 0x2BU |
Define List of Group Address (Broadcast) | |
#define | I3C_CCC_RSTGRPA(broadcast) |
Reset Group Address. | |
#define | I3C_CCC_MLANE(broadcast) |
Multi-Lane Data Transfer Control (Broadcast) | |
#define | I3C_CCC_VENDOR(broadcast, id) |
Vendor/Standard Extension. | |
#define | I3C_CCC_SETDASA 0x87U |
Set Dynamic Address from Static Address (Direct) | |
#define | I3C_CCC_SETNEWDA 0x88U |
Set New Dynamic Address (Direct) | |
#define | I3C_CCC_GETMWL 0x8BU |
Get Max Write Length (Direct) | |
#define | I3C_CCC_GETMRL 0x8CU |
Get Max Read Length (Direct) | |
#define | I3C_CCC_GETPID 0x8DU |
Get Provisioned ID (Direct) | |
#define | I3C_CCC_GETBCR 0x8EU |
Get Bus Characteristics Register (Direct) | |
#define | I3C_CCC_GETDCR 0x8FU |
Get Device Characteristics Register (Direct) | |
#define | I3C_CCC_GETSTATUS 0x90U |
Get Device Status (Direct) | |
#define | I3C_CCC_GETACCCR 0x91U |
Get Accept Controller Role (Direct) | |
#define | I3C_CCC_SETBRGTGT 0x93U |
Set Bridge Targets (Direct) | |
#define | I3C_CCC_GETMXDS 0x94U |
Get Max Data Speed (Direct) | |
#define | I3C_CCC_GETCAPS 0x95U |
Get Optional Feature Capabilities (Direct) | |
#define | I3C_CCC_SETROUTE 0x96U |
Set Route (Direct) | |
#define | I3C_CCC_D2DXFER 0x97U |
Device to Device(s) Tunneling Control (Direct) | |
#define | I3C_CCC_GETXTIME 0x99U |
Get Exchange Timing Information (Direct) | |
#define | I3C_CCC_SETGRPA 0x9BU |
Set Group Address (Direct) | |
#define | I3C_CCC_ENEC_EVT_ENINTR BIT(0) |
Enable Events (ENEC) - Target Interrupt Requests. | |
#define | I3C_CCC_ENEC_EVT_ENCR BIT(1) |
Enable Events (ENEC) - Controller Role Requests. | |
#define | I3C_CCC_ENEC_EVT_ENHJ BIT(3) |
Enable Events (ENEC) - Hot-Join Event. | |
#define | I3C_CCC_ENEC_EVT_ALL (I3C_CCC_ENEC_EVT_ENINTR | I3C_CCC_ENEC_EVT_ENCR | I3C_CCC_ENEC_EVT_ENHJ) |
#define | I3C_CCC_DISEC_EVT_DISINTR BIT(0) |
Disable Events (DISEC) - Target Interrupt Requests. | |
#define | I3C_CCC_DISEC_EVT_DISCR BIT(1) |
Disable Events (DISEC) - Controller Role Requests. | |
#define | I3C_CCC_DISEC_EVT_DISHJ BIT(3) |
Disable Events (DISEC) - Hot-Join Event. | |
#define | I3C_CCC_DISEC_EVT_ALL (I3C_CCC_DISEC_EVT_DISINTR | I3C_CCC_DISEC_EVT_DISCR | I3C_CCC_DISEC_EVT_DISHJ) |
#define | I3C_CCC_EVT_INTR BIT(0) |
Events - Target Interrupt Requests. | |
#define | I3C_CCC_EVT_CR BIT(1) |
Events - Controller Role Requests. | |
#define | I3C_CCC_EVT_HJ BIT(3) |
Events - Hot-Join Event. | |
#define | I3C_CCC_EVT_ALL (I3C_CCC_EVT_INTR | I3C_CCC_EVT_CR | I3C_CCC_EVT_HJ) |
Bitmask for all events. | |
#define | I3C_CCC_GETSTATUS_PROTOCOL_ERR BIT(5) |
GETSTATUS Format 1 - Protocol Error bit. | |
#define | I3C_CCC_GETSTATUS_ACTIVITY_MODE_MASK GENMASK(7U, 6U) |
GETSTATUS Format 1 - Activity Mode bitmask. | |
#define | I3C_CCC_GETSTATUS_ACTIVITY_MODE(status) |
GETSTATUS Format 1 - Activity Mode. | |
#define | I3C_CCC_GETSTATUS_NUM_INT_MASK GENMASK(3U, 0U) |
GETSTATUS Format 1 - Number of Pending Interrupts bitmask. | |
#define | I3C_CCC_GETSTATUS_NUM_INT(status) |
GETSTATUS Format 1 - Number of Pending Interrupts. | |
#define | I3C_CCC_GETSTATUS_PRECR_DEEP_SLEEP_DETECTED BIT(0) |
GETSTATUS Format 2 - PERCR - Deep Sleep Detected bit. | |
#define | I3C_CCC_GETSTATUS_PRECR_HANDOFF_DELAY_NACK BIT(1) |
GETSTATUS Format 2 - PERCR - Handoff Delay NACK. | |
#define | I3C_CCC_GETMXDS_MAX_SDR_FSCL_MAX 0 |
Get Max Data Speed (GETMXDS) - Default Max Sustained Data Rate. | |
#define | I3C_CCC_GETMXDS_MAX_SDR_FSCL_8MHZ 1 |
Get Max Data Speed (GETMXDS) - 8MHz Max Sustained Data Rate. | |
#define | I3C_CCC_GETMXDS_MAX_SDR_FSCL_6MHZ 2 |
Get Max Data Speed (GETMXDS) - 6MHz Max Sustained Data Rate. | |
#define | I3C_CCC_GETMXDS_MAX_SDR_FSCL_4MHZ 3 |
Get Max Data Speed (GETMXDS) - 4MHz Max Sustained Data Rate. | |
#define | I3C_CCC_GETMXDS_MAX_SDR_FSCL_2MHZ 4 |
Get Max Data Speed (GETMXDS) - 2MHz Max Sustained Data Rate. | |
#define | I3C_CCC_GETMXDS_TSCO_8NS 0 |
Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 8ns. | |
#define | I3C_CCC_GETMXDS_TSCO_9NS 1 |
Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 9ns. | |
#define | I3C_CCC_GETMXDS_TSCO_10NS 2 |
Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 10ns. | |
#define | I3C_CCC_GETMXDS_TSCO_11NS 3 |
Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 11ns. | |
#define | I3C_CCC_GETMXDS_TSCO_12NS 4 |
Get Max Data Speed (GETMXDS) - Clock to Data Turnaround <= 12ns. | |
#define | I3C_CCC_GETMXDS_TSCO_GT_12NS 7 |
Get Max Data Speed (GETMXDS) - Clock to Data Turnaround > 12ns. | |
#define | I3C_CCC_GETMXDS_MAXWR_DEFINING_BYTE_SUPPORT BIT(3) |
Get Max Data Speed (GETMXDS) - maxWr - Optional Defining Byte Support. | |
#define | I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL_MASK GENMASK(2U, 0U) |
Get Max Data Speed (GETMXDS) - Max Sustained Data Rate bitmask. | |
#define | I3C_CCC_GETMXDS_MAXWR_MAX_SDR_FSCL(maxwr) |
Get Max Data Speed (GETMXDS) - maxWr - Max Sustained Data Rate. | |
#define | I3C_CCC_GETMXDS_MAXRD_W2R_PERMITS_STOP_BETWEEN BIT(6) |
Get Max Data Speed (GETMXDS) - maxRd - Write-to-Read Permits Stop Between. | |
#define | I3C_CCC_GETMXDS_MAXRD_TSCO_MASK GENMASK(5U, 3U) |
Get Max Data Speed (GETMXDS) - maxRd - Clock to Data Turnaround bitmask. | |
#define | I3C_CCC_GETMXDS_MAXRD_TSCO(maxrd) |
Get Max Data Speed (GETMXDS) - maxRd - Clock to Data Turnaround. | |
#define | I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL_MASK GENMASK(2U, 0U) |
Get Max Data Speed (GETMXDS) - maxRd - Max Sustained Data Rate bitmask. | |
#define | I3C_CCC_GETMXDS_MAXRD_MAX_SDR_FSCL(maxrd) |
Get Max Data Speed (GETMXDS) - maxRd - Max Sustained Data Rate. | |
#define | I3C_CCC_GETMXDS_CRDHLY1_SET_BUS_ACT_STATE BIT(2) |
Get Max Data Speed (GETMXDS) - CRDHLY1 - Set Bus Activity State bit shift value. | |
#define | I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE_MASK GENMASK(1U, 0U) |
Get Max Data Speed (GETMXDS) - CRDHLY1 - Controller Handoff Activity State bitmask. | |
#define | I3C_CCC_GETMXDS_CRDHLY1_CTRL_HANDOFF_ACT_STATE(crhdly1) |
Get Max Data Speed (GETMXDS) - CRDHLY1 - Controller Handoff Activity State. | |
#define | I3C_CCC_GETCAPS1_HDR_DDR BIT(0) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR-DDR mode bit. | |
#define | I3C_CCC_GETCAPS1_HDR_TSP BIT(1) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR-TSP mode bit. | |
#define | I3C_CCC_GETCAPS1_HDR_TSL BIT(2) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR-TSL mode bit. | |
#define | I3C_CCC_GETCAPS1_HDR_BT BIT(3) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR-BT mode bit. | |
#define | I3C_CCC_GETCAPS1_HDR_MODE(x) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) - HDR Mode. | |
#define | I3C_CCC_GETCAPS1_HDR_MODE0 BIT(0) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR Mode 0. | |
#define | I3C_CCC_GETCAPS1_HDR_MODE1 BIT(1) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR Mode 1. | |
#define | I3C_CCC_GETCAPS1_HDR_MODE2 BIT(2) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR Mode 2. | |
#define | I3C_CCC_GETCAPS1_HDR_MODE3 BIT(3) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR Mode 3. | |
#define | I3C_CCC_GETCAPS1_HDR_MODE4 BIT(4) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR Mode 4. | |
#define | I3C_CCC_GETCAPS1_HDR_MODE5 BIT(5) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR Mode 5. | |
#define | I3C_CCC_GETCAPS1_HDR_MODE6 BIT(6) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR Mode 6. | |
#define | I3C_CCC_GETCAPS1_HDR_MODE7 BIT(7) |
Get Optional Feature Capabilities Byte 1 (GETCAPS) Format 1 - HDR Mode 7. | |
#define | I3C_CCC_GETCAPS2_HDRDDR_WRITE_ABORT BIT(6) |
Get Optional Feature Capabilities Byte 2 (GETCAPS) Format 1 - HDR-DDR Write Abort bit. | |
#define | I3C_CCC_GETCAPS2_HDRDDR_ABORT_CRC BIT(7) |
Get Optional Feature Capabilities Byte 2 (GETCAPS) Format 1 - HDR-DDR Abort CRC bit. | |
#define | I3C_CCC_GETCAPS2_GRPADDR_CAP_MASK GENMASK(5U, 4U) |
Get Optional Feature Capabilities Byte 2 (GETCAPS) Format 1 - Group Address Capabilities bitmask. | |
#define | I3C_CCC_GETCAPS2_GRPADDR_CAP(getcaps2) |
Get Optional Feature Capabilities Byte 2 (GETCAPS) Format 1 - Group Address Capabilities. | |
#define | I3C_CCC_GETCAPS2_SPEC_VER_MASK GENMASK(3U, 0U) |
Get Optional Feature Capabilities Byte 2 (GETCAPS) Format 1 - I3C 1.x Specification Version bitmask. | |
#define | I3C_CCC_GETCAPS2_SPEC_VER(getcaps2) |
Get Optional Feature Capabilities Byte 2 (GETCAPS) Format 1 - I3C 1.x Specification Version. | |
#define | I3C_CCC_GETCAPS3_MLANE_SUPPORT BIT(0) |
Get Optional Feature Capabilities Byte 3 (GETCAPS) Format 1 - Multi-Lane Data Transfer Support bit. | |
#define | I3C_CCC_GETCAPS3_D2DXFER_SUPPORT BIT(1) |
Get Optional Feature Capabilities Byte 3 (GETCAPS) Format 1 - Device to Device Transfer (D2DXFER) Support bit. | |
#define | I3C_CCC_GETCAPS3_D2DXFER_IBI_CAPABLE BIT(2) |
Get Optional Feature Capabilities Byte 3 (GETCAPS) Format 1 - Device to Device Transfer (D2DXFER) IBI Capable bit. | |
#define | I3C_CCC_GETCAPS3_GETCAPS_DEFINING_BYTE_SUPPORT BIT(3) |
Get Optional Feature Capabilities Byte 3 (GETCAPS) Format 1 - Defining Byte Support in GETCAPS bit. | |
#define | I3C_CCC_GETCAPS3_GETSTATUS_DEFINING_BYTE_SUPPORT BIT(4) |
Get Optional Feature Capabilities Byte 3 (GETCAPS) Format 1 - Defining Byte Support in GETSTATUS bit. | |
#define | I3C_CCC_GETCAPS3_HDRBT_CRC32_SUPPORT BIT(5) |
Get Optional Feature Capabilities Byte 3 (GETCAPS) Format 1 - HDR-BT CRC-32 Support bit. | |
#define | I3C_CCC_GETCAPS3_IBI_MDR_PENDING_READ_NOTIFICATION BIT(6) |
Get Optional Feature Capabilities Byte 3 (GETCAPS) Format 1 - IBI MDB Support for Pending Read Notification bit. | |
#define | I3C_CCC_GETCAPS_TESTPAT1 0xA5 |
Get Fixed Test Pattern (GETCAPS) Format 2 - Fixed Test Pattern Byte 1. | |
#define | I3C_CCC_GETCAPS_TESTPAT2 0x5A |
Get Fixed Test Pattern (GETCAPS) Format 2 - Fixed Test Pattern Byte 2. | |
#define | I3C_CCC_GETCAPS_TESTPAT3 0xA5 |
Get Fixed Test Pattern (GETCAPS) Format 2 - Fixed Test Pattern Byte 3. | |
#define | I3C_CCC_GETCAPS_TESTPAT4 0x5A |
Get Fixed Test Pattern (GETCAPS) Format 2 - Fixed Test Pattern Byte 4. | |
#define | I3C_CCC_GETCAPS_TESTPAT 0xA55AA55A |
Get Fixed Test Pattern (GETCAPS) Format 2 - Fixed Test Pattern Word in Big Endian. | |
#define | I3C_CCC_GETCAPS_CRCAPS1_HJ_SUPPORT BIT(0) |
Get Controller Handoff Capabilities Byte 1 (GETCAPS) Format 2 - Hot-Join Support. | |
#define | I3C_CCC_GETCAPS_CRCAPS1_GRP_MANAGEMENT_SUPPORT BIT(1) |
Get Controller Handoff Capabilities Byte 1 (GETCAPS) Format 2 - Group Management Support. | |
#define | I3C_CCC_GETCAPS_CRCAPS1_ML_SUPPORT BIT(2) |
Get Controller Handoff Capabilities Byte 1 (GETCAPS) Format 2 - Multi-Lane Support. | |
#define | I3C_CCC_GETCAPS_CRCAPS2_IBI_TIR_SUPPORT BIT(0) |
Get Controller Handoff Capabilities Byte 2 (GETCAPS) Format 2 - In-Band Interrupt Support. | |
#define | I3C_CCC_GETCAPS_CRCAPS2_CONTROLLER_PASSBACK BIT(1) |
Get Controller Handoff Capabilities Byte 2 (GETCAPS) Format 2 - Controller Pass-Back. | |
#define | I3C_CCC_GETCAPS_CRCAPS2_DEEP_SLEEP_CAPABLE BIT(2) |
Get Controller Handoff Capabilities Byte 2 (GETCAPS) Format 2 - Deep Sleep Capable. | |
#define | I3C_CCC_GETCAPS_CRCAPS2_DELAYED_CONTROLLER_HANDOFF BIT(3) |
Get Controller Handoff Capabilities Byte 2 (GETCAPS) Format 2 - Deep Sleep Capable. | |
#define | I3C_CCC_GETCAPS_VTCAP1_VITRUAL_TARGET_TYPE_MASK GENMASK(2U, 0U) |
Get Capabilities (GETCAPS) - VTCAP1 - Virtual Target Type bitmask. | |
#define | I3C_CCC_GETCAPS_VTCAP1_VITRUAL_TARGET_TYPE(vtcap1) |
Get Capabilities (GETCAPS) - VTCAP1 - Virtual Target Type. | |
#define | I3C_CCC_GETCAPS_VTCAP1_SIDE_EFFECTS BIT(4) |
Get Virtual Target Capabilities Byte 1 (GETCAPS) Format 2 - Side Effects. | |
#define | I3C_CCC_GETCAPS_VTCAP1_SHARED_PERIPH_DETECT BIT(5) |
Get Virtual Target Capabilities Byte 1 (GETCAPS) Format 2 - Shared Peripheral Detect. | |
#define | I3C_CCC_GETCAPS_VTCAP2_INTERRUPT_REQUESTS_MASK GENMASK(1U, 0U) |
Get Capabilities (GETCAPS) - VTCAP2 - Interrupt Requests bitmask. | |
#define | I3C_CCC_GETCAPS_VTCAP2_INTERRUPT_REQUESTS(vtcap2) |
Get Capabilities (GETCAPS) - VTCAP2 - Interrupt Requests. | |
#define | I3C_CCC_GETCAPS_VTCAP2_ADDRESS_REMAPPING BIT(2) |
Get Virtual Target Capabilities Byte 2 (GETCAPS) Format 2 - Address Remapping. | |
#define | I3C_CCC_GETCAPS_VTCAP2_BUS_CONTEXT_AND_COND_MASK GENMASK(4U, 3U) |
Get Capabilities (GETCAPS) - VTCAP2 - Bus Context and Condition bitmask. | |
#define | I3C_CCC_GETCAPS_VTCAP2_BUS_CONTEXT_AND_COND(vtcap2) |
Get Capabilities (GETCAPS) - VTCAP2 - Bus Context and Condition. | |
Set Bus Context MIPI I3C Specification v1.Y Minor Version (SETBUSCON) | |
Examples: Bit[5] Bit[4] Bits[3:0] I3C Basic v1.1.0: 1’b0 || 1’b1 || 4’b0001 or 8’b00010001 I3C Basic v1.1.1: 1’b1 || 1’b1 || 4’b0001 or 8’b00110001 I3C Basic v1.2.0: 1’b0 || 1’b1 || 4’b0010 or 8’b00010010 | |
#define | I3C_CCC_SETBUSCON_I3C_SPEC_MINOR_VER_MASK GENMASK(3U, 0U) |
I3C Specification Minor Version shift mask. | |
#define | I3C_CCC_SETBUSCON_I3C_SPEC_MINOR_VER(y) |
I3C Specification Minor Version (v1.Y) | |
#define | I3C_CCC_SETBUSCON_I3C_SPEC_I3C_SPEC 0 |
MIPI I3C Specification. | |
#define | I3C_CCC_SETBUSCON_I3C_SPEC_I3C_BASIC_SPEC BIT(4) |
MIPI I3C Basic Specification. | |
#define | I3C_CCC_SETBUSCON_I3C_SPEC_I3C_SPEC_EDITORIAL_1_Y_0 0 |
Version 1.Y.0. | |
#define | I3C_CCC_SETBUSCON_I3C_SPEC_I3C_SPEC_EDITORIAL_1_Y_1 BIT(5) |
Version 1.Y.1 or greater. | |
Set Bus Context Other Standards Organizations (SETBUSCON) | |
#define | I3C_CCC_SETBUSCON_OTHER_STANDARDS_JEDEC_SIDEBAND 128 |
JEDEC Sideband. | |
#define | I3C_CCC_SETBUSCON_OTHER_STANDARDS_MCTP 129 |
MCTP. | |
#define | I3C_CCC_SETBUSCON_OTHER_STANDARDS_ETSI 130 |
ETSI. | |
Functions | |
static bool | i3c_ccc_is_payload_broadcast (const struct i3c_ccc_payload *payload) |
Test if I3C CCC payload is for broadcast. | |
int | i3c_ccc_do_getbcr (struct i3c_device_desc *target, struct i3c_ccc_getbcr *bcr) |
Get BCR from a target. | |
int | i3c_ccc_do_getdcr (struct i3c_device_desc *target, struct i3c_ccc_getdcr *dcr) |
Get DCR from a target. | |
int | i3c_ccc_do_getpid (struct i3c_device_desc *target, struct i3c_ccc_getpid *pid) |
Get PID from a target. | |
int | i3c_ccc_do_rstact_all (const struct device *controller, enum i3c_ccc_rstact_defining_byte action) |
Broadcast RSTACT to reset I3C Peripheral (Format 1). | |
int | i3c_ccc_do_rstact (const struct i3c_device_desc *target, enum i3c_ccc_rstact_defining_byte action, bool get, uint8_t *data) |
Single target RSTACT to reset I3C Peripheral. | |
static int | i3c_ccc_do_rstact_fmt2 (const struct i3c_device_desc *target, enum i3c_ccc_rstact_defining_byte action) |
Single target RSTACT to reset I3C Peripheral (Format 2). | |
static int | i3c_ccc_do_rstact_fmt3 (const struct i3c_device_desc *target, enum i3c_ccc_rstact_defining_byte action, uint8_t *data) |
Single target RSTACT to reset I3C Peripheral (Format 3). | |
int | i3c_ccc_do_rstdaa_all (const struct device *controller) |
Broadcast RSTDAA to reset dynamic addresses for all targets. | |
int | i3c_ccc_do_setdasa (const struct i3c_device_desc *target, struct i3c_ccc_address da) |
Set Dynamic Address from Static Address for a target. | |
int | i3c_ccc_do_setnewda (const struct i3c_device_desc *target, struct i3c_ccc_address new_da) |
Set New Dynamic Address for a target. | |
int | i3c_ccc_do_events_all_set (const struct device *controller, bool enable, struct i3c_ccc_events *events) |
Broadcast ENEC/DISEC to enable/disable target events. | |
int | i3c_ccc_do_events_set (struct i3c_device_desc *target, bool enable, struct i3c_ccc_events *events) |
Direct CCC ENEC/DISEC to enable/disable target events. | |
int | i3c_ccc_do_entas (const struct i3c_device_desc *target, uint8_t as) |
Direct ENTAS to set the Activity State. | |
static int | i3c_ccc_do_entas0 (const struct i3c_device_desc *target) |
Direct ENTAS0. | |
static int | i3c_ccc_do_entas1 (const struct i3c_device_desc *target) |
Direct ENTAS1. | |
static int | i3c_ccc_do_entas2 (const struct i3c_device_desc *target) |
Direct ENTAS2. | |
static int | i3c_ccc_do_entas3 (const struct i3c_device_desc *target) |
Direct ENTAS3. | |
int | i3c_ccc_do_entas_all (const struct device *controller, uint8_t as) |
Broadcast ENTAS to set the Activity State. | |
static int | i3c_ccc_do_entas0_all (const struct device *controller) |
Broadcast ENTAS0. | |
static int | i3c_ccc_do_entas1_all (const struct device *controller) |
Broadcast ENTAS1. | |
static int | i3c_ccc_do_entas2_all (const struct device *controller) |
Broadcast ENTAS2. | |
static int | i3c_ccc_do_entas3_all (const struct device *controller) |
Broadcast ENTAS3. | |
int | i3c_ccc_do_setmwl_all (const struct device *controller, const struct i3c_ccc_mwl *mwl) |
Broadcast SETMWL to Set Maximum Write Length. | |
int | i3c_ccc_do_setmwl (const struct i3c_device_desc *target, const struct i3c_ccc_mwl *mwl) |
Single target SETMWL to Set Maximum Write Length. | |
int | i3c_ccc_do_getmwl (const struct i3c_device_desc *target, struct i3c_ccc_mwl *mwl) |
Single target GETMWL to Get Maximum Write Length. | |
int | i3c_ccc_do_setmrl_all (const struct device *controller, const struct i3c_ccc_mrl *mrl, bool has_ibi_size) |
Broadcast SETMRL to Set Maximum Read Length. | |
int | i3c_ccc_do_setmrl (const struct i3c_device_desc *target, const struct i3c_ccc_mrl *mrl) |
Single target SETMRL to Set Maximum Read Length. | |
int | i3c_ccc_do_getmrl (const struct i3c_device_desc *target, struct i3c_ccc_mrl *mrl) |
Single target GETMRL to Get Maximum Read Length. | |
int | i3c_ccc_do_enttm (const struct device *controller, enum i3c_ccc_enttm_defbyte defbyte) |
Broadcast ENTTM. | |
int | i3c_ccc_do_getstatus (const struct i3c_device_desc *target, union i3c_ccc_getstatus *status, enum i3c_ccc_getstatus_fmt fmt, enum i3c_ccc_getstatus_defbyte defbyte) |
Single target GETSTATUS to Get Target Status. | |
static int | i3c_ccc_do_getstatus_fmt1 (const struct i3c_device_desc *target, union i3c_ccc_getstatus *status) |
Single target GETSTATUS to Get Target Status (Format 1). | |
static int | i3c_ccc_do_getstatus_fmt2 (const struct i3c_device_desc *target, union i3c_ccc_getstatus *status, enum i3c_ccc_getstatus_defbyte defbyte) |
Single target GETSTATUS to Get Target Status (Format 2). | |
int | i3c_ccc_do_getcaps (const struct i3c_device_desc *target, union i3c_ccc_getcaps *caps, enum i3c_ccc_getcaps_fmt fmt, enum i3c_ccc_getcaps_defbyte defbyte) |
Single target GETCAPS to Get Target Status. | |
static int | i3c_ccc_do_getcaps_fmt1 (const struct i3c_device_desc *target, union i3c_ccc_getcaps *caps) |
Single target GETCAPS to Get Capabilities (Format 1). | |
static int | i3c_ccc_do_getcaps_fmt2 (const struct i3c_device_desc *target, union i3c_ccc_getcaps *caps, enum i3c_ccc_getcaps_defbyte defbyte) |
Single target GETCAPS to Get Capabilities (Format 2). | |
int | i3c_ccc_do_setvendor (const struct i3c_device_desc *target, uint8_t id, uint8_t *payload, size_t len) |
Single target to Set Vendor / Standard Extension CCC. | |
int | i3c_ccc_do_getvendor (const struct i3c_device_desc *target, uint8_t id, uint8_t *payload, size_t len, size_t *num_xfer) |
Single target to Get Vendor / Standard Extension CCC. | |
int | i3c_ccc_do_getvendor_defbyte (const struct i3c_device_desc *target, uint8_t id, uint8_t defbyte, uint8_t *payload, size_t len, size_t *num_xfer) |
Single target to Get Vendor / Standard Extension CCC with a defining byte. | |
int | i3c_ccc_do_setvendor_all (const struct device *controller, uint8_t id, uint8_t *payload, size_t len) |
Broadcast Set Vendor / Standard Extension CCC. | |
int | i3c_ccc_do_setaasa_all (const struct device *controller) |
Broadcast SETAASA to set all target's dynamic address to their static address. | |
int | i3c_ccc_do_getmxds (const struct i3c_device_desc *target, union i3c_ccc_getmxds *caps, enum i3c_ccc_getmxds_fmt fmt, enum i3c_ccc_getmxds_defbyte defbyte) |
Single target GETMXDS to Get Max Data Speed. | |
static int | i3c_ccc_do_getmxds_fmt1 (const struct i3c_device_desc *target, union i3c_ccc_getmxds *caps) |
Single target GETMXDS to Get Max Data Speed (Format 1). | |
static int | i3c_ccc_do_getmxds_fmt2 (const struct i3c_device_desc *target, union i3c_ccc_getmxds *caps) |
Single target GETMXDS to Get Max Data Speed (Format 2). | |
static int | i3c_ccc_do_getmxds_fmt3 (const struct i3c_device_desc *target, union i3c_ccc_getmxds *caps, enum i3c_ccc_getmxds_defbyte defbyte) |
Single target GETMXDS to Get Max Data Speed (Format 3). | |
int | i3c_ccc_do_deftgts_all (const struct device *controller, struct i3c_ccc_deftgts *deftgts) |
Broadcast DEFTGTS. | |
int | i3c_ccc_do_setbuscon (const struct device *controller, uint8_t *context, uint16_t length) |
Broadcast SETBUSCON to set the bus context. | |