MKS CANable V2.0
Overview
The Makerbase MKS CANable V2.0 board features an ARM Cortex-M4 based STM32G431C8 MCU with a CAN, USB and debugger connections. Here are some highlights of the MKS CANable V2.0 board:
STM32 microcontroller in LQFP48 package
USB Type-C connector (J1)
CAN-Bus connector (J2)
ST-LINK/V3E debugger/programmer header (J4)
USB VBUS power supply (5 V)
Three LEDs: red/power_led (D1), blue/stat_led (D2), green/word_led (D3)
One push-button for RESET
Development support: serial wire debug (SWD), JTAG, Embedded Trace Macrocell.
The LED red/power_led (D1) is connected directly to on-board 3.3 V and not controllable by the MCU.
More information about the board can be found at the MKS CANable V2.0 website [1]. It is very advisable to take a look in on user manual MKS CANable V2.0 User Manual [2] and schematic MKS CANable V2.0 schematic [3] before start.
More information about STM32G431KB can be found here:
Supported Features
The mks_canable_v20 board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-M4F CPU1 |
|
ADC |
on-chip |
STM32 ADC2 |
|
CAN |
on-chip |
STM32 FDCAN CAN FD controller1 |
|
Clock control |
on-chip |
STM32 RCC (Reset and Clock controller)1 |
|
on-chip |
STM32 HSE Clock1 |
||
on-chip |
|||
on-chip |
STM32 LSE Clock1 |
||
on-chip |
STM32G4 main PLL1 |
||
Counter |
on-chip |
STM32 counters6 |
|
DAC |
on-chip |
STM32 family DAC2 |
|
DMA |
on-chip |
STM32 DMA controller (V2)2 |
|
on-chip |
STM32 DMAMUX controller1 |
||
Flash controller |
on-chip |
STM32 Family flash controller1 |
|
GPIO & Headers |
on-chip |
STM32 GPIO Controller7 |
|
I2C |
on-chip |
STM32 I2C V2 controller3 |
|
Interrupt controller |
on-chip |
ARMv7-M NVIC (Nested Vectored Interrupt Controller)1 |
|
on-chip |
STM32 External Interrupt Controller1 |
||
LED |
on-board |
Group of GPIO-controlled LEDs1 |
|
MTD |
on-chip |
STM32 flash memory1 |
|
PHY |
on-chip |
This binding is to be used by all the usb transceivers which are built-in with USB IP1 |
|
Pin control |
on-chip |
STM32 Pin controller1 |
|
PWM |
on-chip |
STM32 PWM8 |
|
Reset controller |
on-chip |
STM32 Reset and Clock Control (RCC) Controller1 |
|
RNG |
on-chip |
STM32 Random Number Generator1 |
|
RTC |
on-chip |
STM32 RTC1 |
|
Sensors |
on-chip |
STM32 family TEMP node for production calibrated sensors with two calibration temperatures1 |
|
on-chip |
STM32 VREF+1 |
||
on-chip |
STM32 VBAT1 |
||
Serial controller |
on-chip |
STM32 USART3 |
|
on-chip |
STM32 UART1 |
||
on-chip |
STM32 LPUART1 |
||
SMbus |
on-chip |
STM32 SMBus controller3 |
|
SPI |
on-chip |
STM32 SPI controller with embedded Rx and Tx FIFOs3 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
USB Type-C Port Controller |
on-chip |
STM32 USB Type-C / Power Delivery1 |
|
Timer |
on-chip |
ARMv7-M System Tick1 |
|
on-chip |
STM32 low-power timer (LPTIM)1 |
||
on-chip |
STM32 timers10 |
||
USB |
on-chip |
STM32 USB controller1 |
|
Watchdog |
on-chip |
STM32 watchdog1 |
|
on-chip |
STM32 system window watchdog1 |
Connections and IOs
Default Zephyr Peripheral Mapping:
CAN_RX/BOOT0 : PB8
CAN_TX : PB9
D2 : PA15
D3 : PA0
USB_DN : PA11
USB_DP : PA12
SWDIO : PA13
SWCLK : PA14
NRST : PG10
For more details please refer to MKS CANable V2.0 schematic [3].
System Clock
The MKS CANable V2.0 system clock is driven by internal high speed oscillator. By default system clock is driven by PLL clock at 160 MHz, the PLL is driven by the 16 MHz high speed internal oscillator.
The FDCAN1 peripheral is driven by PLLQ, which has 80 MHz frequency.
Programming and Debugging
The mks_canable_v20 board supports the runners and associated west commands listed below.
| flash | debug | attach | debugserver | rtt | |
|---|---|---|---|---|---|
| openocd | ✅ (default) | ✅ (default) | ✅ | ✅ | ✅ |
MKS CANable V2.0 board includes an SWDIO debug connector header J4.
Note
The debugger is not the part of the board!
Applications for the mks_canable_v20 board target can be built and
flashed in the usual way (see Building an Application and
Run an Application for more details).
Flashing
The board could be flashed using west.
Flashing an application to MKS CANable V2.0
The debugger shall be wired to MKS CANable V2.0 board’s J4 connector according MKS CANable V2.0 schematic [3].
Build and flash an application. Here is an example for Hello World.
west build -b mks_canable_v20 -S rtt-console samples/hello_world
west flash
The argument -S rtt-console is needed for debug purposes with SEGGER RTT protocol.
This option is optional and may be omitted. Omitting it frees up RAM space but prevents RTT usage.
If option -S rtt-console is selected, the connection to the target can be established as follows:
$ telnet localhost 9090
You should see the following message on the console:
$ Hello World! mks_canable_v20/stm32g431xx
Note
Current OpenOCD config will skip Segger RTT for OpenOCD under 0.12.0.
Debugging
You can debug an application in the usual way. Here is an example for the Hello World application.
# From the root of the zephyr repository
west build -b mks_canable_v20 samples/hello_world
west debug