st,stm32-fdcan

Vendor: STMicroelectronics

Description

ST STM32 FDCAN CAN FD controller

Properties

Top level properties

These property descriptions apply to “st,stm32-fdcan” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

Name

Type

Details

bitrate

int

Initial bitrate in bit/s. If this is unset, the initial bitrate is set to
CONFIG_CAN_DEFAULT_BITRATE.

sample-point

int

Initial sample point in per mille (e.g. 875 equals 87.5%).

If this is unset (or if it is set to 0), the initial sample point will default to 75.0% for
bitrates over 800 kbit/s, 80.0% for bitrates over 500 kbit/s, and 87.5% for all other
bitrates.

phys

phandle

Actively controlled CAN transceiver.

Example:
  transceiver0: can-phy0 {
    compatible = "nxp,tja1040", "can-transceiver-gpio";
    standby-gpios = <gpioa 0 GPIO_ACTIVE_HIGH>;
    max-bitrate = <1000000>;
    #phy-cells = <0>;
  };

  &can0 {
    status = "okay";

    phys = <&transceiver0>;
  };

bitrate-data

int

Initial data phase bitrate in bit/s.  If this is unset, the initial data phase bitrate is set
to CONFIG_CAN_DEFAULT_BITRATE_DATA.

sample-point-data

int

Initial data phase sample point in per mille (e.g. 875 equals 87.5%).

If this is unset (or if it is set to 0), the initial sample point will default to 75.0% for
bitrates over 800 kbit/s, 80.0% for bitrates over 500 kbit/s, and 87.5% for all other
bitrates.

bosch,mram-cfg

array

Bosch M_CAN message RAM configuration. The cells in the array have the following format:

<offset std-filter-elements ext-filter-elements rx-fifo0-elements rx-fifo1-elements
rx-buffer-elements tx-event-fifo-elements tx-buffer-elements>

The 'offset' is an address offset of the message RAM where the following elements start
from. This is normally set to 0x0 when using a non-shared message RAM. The remaining cells
specify how many elements are allocated for each filter type/FIFO/buffer.

The Bosch M_CAN IP supports the following elements:
11-bit Filter    0-128 elements / 0-128 words
29-bit Filter     0-64 elements / 0-128 words
Rx FIFO 0                   0-64 elements / 0-1152 words
Rx FIFO 1                   0-64 elements / 0-1152 words
Rx Buffers          0-64 elements / 0-1152 words
Tx Event FIFO     0-32 elements / 0-64 words
Tx Buffers          0-32 elements / 0-576 words

This property is required.

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

clk-divider

int

Divides the kernel clock giving the time quanta clock that is fed to the
CAN core(FDCAN_CKDIV).
Note that the divisor is common to all 'st,stm32-fdcan' instances.
Divide by 1 is the peripherals reset value and remains set unless
this property is configured.

Legal values: 1, 2, 4, 6, 8, 10, 12, 14, 16, 18, 20, 22, 24, 26, 28, 30

Child node properties

Name

Type

Details

min-bitrate

int

The minimum bitrate supported by the CAN transceiver in bits/s.

max-bitrate

int

The maximum bitrate supported by the CAN transceiver in bits/s.

This property is required.