ENE KB1062_EVB

Board Overview

Name:

kb1062_evb

Vendor:

ENE Technology, Inc.

Architecture:

arm

SoC:

kb1062

Browse board sources

Overview

The KB1062_EVB kit is a development platform to evaluate the ENE KB106X series microcontrollers. This board needs to be mated with part number KB1062.

Hardware

• ARM Cortex-M3 Processor

• 256KB Flash and 64KB RAM

• ADC & GPIO headers

• SER serial port

• FAN PWM interface

• ENE Debug interface

Supported Features

The kb1062_evb board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

kb1062_evb

/

kb1062

kb1062_evb/kb1062 target

Type	Location	Description	Compatible
CPU	on-chip	ARM Cortex-M3 CPU1	arm,cortex-m3
ADC	on-chip	ENE KB106X ADC controller1	ene,kb106x-adc
GPIO & Headers	on-chip	ENE KB106X GPIO(General purpose IO) Port node2 3	ene,kb106x-gpio
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	ARMv7-M NVIC (Nested Vectored Interrupt Controller)1	arm,v7m-nvic
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
Miscellaneous	on-chip	ENE, General Configuration1	ene,kb106x-gcfg
MTD	on-chip	Flash node1	soc-nv-flash
Pin control	on-chip	The ENE KB106X pin controller is a singleton node responsible for controlling pin function selection and pin properties1	ene,kb106x-pinctrl
PWM	on-chip	ENE, Pulse Width Modulator (PWM) node4	ene,kb106x-pwm
Serial controller	on-chip	ENE KB106X UART1	ene,kb106x-uart
SRAM	on-chip	Generic on-chip SRAM1	mmio-sram
Timer	on-chip	ARMv7-M System Tick1	arm,armv7m-systick
Watchdog	on-chip	ENE watchdog timer1	ene,kb106x-watchdog

System Clock

The KB106x MCU is configured to use the 48Mhz internal oscillator with the on-chip DPLL to generate a resulting EC clock rate of 48MHz/24MHz See Processor clock control register (refer 5.1 General Configuration)

Programming and Debugging

The kb1062_evb board supports the runners and associated west commands listed below.

	flash	debug	debugserver	attach	rtt
jlink	✅	✅	✅	✅	✅
openocd	✅ (default)	✅ (default)	✅	✅	✅

Flashing

If the correct headers are installed, this board supports SWD Debug Interface.

To flash with SWD, install the drivers for your programmer, for example: SEGGER J-link’s drivers are at https://www.segger.com/downloads/jlink/

Debugging

Use SWD with a J-Link

References