BeagleBadge
Overview
BeagleBoard.org BeagleBadge brings a new vision to wearables by combining powerful built-in sensing with unmatched expansion flexibility. Based on a TI Sitara AM62L dual-core ARM Cortex-A53 SoC
See the BeagleBoard.org BeagleBadge Product Page for details.
Hardware
Processor
TI Sitara AM62L SoC with 2x ARM Cortex-A53
Memory
256MB LPDDR4
256Mb OSPI flash
32Kb EEPROM
Wireless connectivity
BeagleMod CC3301-1216 Module WiFi6 (2.4GHz)
Bluetooth 5.2 with MHF4 Connector
LoRaWAN (Wio SX1262 module) with u.FL Connector
Built-in Sensors
1x IMU Sensor
1x Ambient light sensor
1x Temperature & humidity sensor
User interface
4.2″ ePaper Display
1x 4-way Joystick button with press
2x Tactile buttons (Back and Select)
1x Passive Buzzer
1x RGB status LED
2x 7-segment LED displays
Expansion
MIPI DSI connector for LCD displays
USB Type-C for Power input and debug
1x mikroBus Connector
1x USB2.0 Type-A host
1x Micro-SD socket
2x QWIIC Connector
1x Grove Connector
Supported Features
The beaglebadge board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo -
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
beaglebadge/am62l3/a53 target
Type |
Location |
Description |
Compatible |
|---|---|---|---|
CPU |
on-chip |
ARM Cortex-A53 CPU2 |
|
ADC |
on-chip |
TI AM335X ADC1 |
|
Display |
on-board |
Solomon SSD16XX EPD display controller1 |
|
Firmware |
on-chip |
SCMI (System Control and Management Interface) with ARM SMC as doorbell and SHMEM (shared memory) transport1 |
|
on-chip |
SCMI (System Control and Management Interface) power domain protocol1 |
||
on-chip |
SCMI (System Control and Management Interface) clock protocol1 |
||
on-chip |
SCMI (System Control and Management Interface) SHMEM (shared memory)1 |
||
GPIO & Headers |
on-chip |
||
I2C |
on-chip |
TI OMAP I2C Controller5 |
|
Input |
on-board |
Group of GPIO-bound input keys1 |
|
Interrupt controller |
on-chip |
ARM Generic Interrupt Controller v31 |
|
on-chip |
GIC v3 Interrupt Translation Service1 |
||
Pin control |
on-chip |
TI K3 Pin Controller1 |
|
Power management CPU operations |
on-chip |
Power State Coordination Interface (PSCI) version 1.11 |
|
Power domain |
on-chip |
SCMI (System Control and Management Interface) power domain20 |
|
Serial controller |
on-chip |
||
SPI |
on-chip |
TI Multi Channel SPI controller for OMAP and K3 SoCs4 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
Timer |
on-chip |
TI Dual-Mode Timer6 |
|
on-chip |
per-core ARM architected timer1 |
||
Watchdog |
on-chip |
K3 Watchdog timer (RTI module) available in the K3 generation of processors2 |
Devices
Serial Port
This board configuration uses a single serial communication channel with the MAIN domain UART (main_uart0).
SD Card
Build the AM62L SDK as described here Building the SDK with Yocto using MACHINE=beaglebadge-ti. Flash the resulting WIC file with an etching software onto an SD card.
Build Zephyr, for example build the Hello World sample with the following command:
# From the root of the zephyr repository
west build -b beaglebadge/am62l3/a53 samples/hello_world
This builds the program and the binary is present in the build/zephyr
directory as zephyr.bin.
Copy the compiled zephyr.bin to the first FAT partition of the SD card and
plug the SD card into the board. Power it up and stop the U-Boot execution at
prompt.
Use U-Boot to load and start zephyr.bin:
fatload mmc 1:1 0x82000000 zephyr.bin; dcache flush; icache flush; dcache off; icache off; go 0x82000000
The Zephyr application should start running on the A53 cores.
Debugging
The board is equipped with JTAG exposed over an edge SOICbite connector.