Myra SiP Baseboard

Overview

The Myra SiP Baseboard features Antmicro’s Myra SiP, which integrates the STM32G491REI6 MCU, 128kB FRAM, and FTDI FT231XQ USB to UART converter. The board is equipped with temperature, humidity, and pressure sensors, designed to help monitor conditions in server rooms.

The sensors are placed on a separate island that is detachable from the main PCB and can be installed directly in the required place. It provides local storage for data logging and a battery backup for protection against data loss. The board can be used as a building block for PoC solutions for monitoring environmental parameters.

Key features include:

  • STM32G491REI6 MCU (Cortex-M4, 170 MHz)

  • 128 KB Fujitsu FRAM

  • FTDI FT231XQ USB to UART converter

  • 50 mm x 26.5 mm PCB

  • USB-C Connector for data and power

  • SHT45 temperature + humidity sensor

  • BME280 temperature + humidity + pressure sensor

  • QWIIC connectors for peripheral expansion

  • RTC with battery backup

More information about the board can be found on Antmicro’s Open Hardware Portal.

Hardware

Myra SiP provides the following hardware:

  • STM32G491REI6 MCU:

    • ARM Cortex-M4 CPU with FPU, up to 170 MHz

    • Clock Sources:

      • 4 to 48 MHz external crystal oscillator (HSE)

      • 32 kHz crystal oscillator for RTC (LSE)

      • Internal 16 MHz RC (±1%)

      • Internal low-power 32 kHz RC (±5%)

      • 2 PLLs for system clock, USB, audio, ADC

    • RTC: Real-time clock with hardware calendar, alarms, and calibration

    • Timers:

      • 1x 32-bit timer and 2x 16-bit timers with up to 4x IC/OC/PWM or pulse counter and quadrature (incremental) encoder input

      • 3x 16-bit advanced motor control timers with up to 8x PWM channels, dead time generation, emergency stop

      • 1x 16-bit timer with 2x IC/OC, one OCN/PWM, dead time generation, emergency stop

      • 2x watchdog timers (independent, window)

      • 2x 16-bit basic timers

      • SysTick timer

      • 1x low-power timer

    • I/Os: Up to 86 fast I/Os, most 5V tolerant

    • Memory:

      • 512 KB Flash memory with ECC and PCROP protection

      • 96 KB SRAM including 32 KB with hardware parity check

    • Analog peripherals:

      • 3x 16-bit ADCs with up to 36 channels, hardware oversampling, and resolution up to 16-bit

      • 4x 12-bit DAC channels

      • 4x ultra-fast rail-to-rail analog comparators

      • 4x operational amplifiers with built-in PGA

      • Internal temperature sensor and voltage reference with support for three output voltages (2.048 V, 2.5 V, 2.9 V)

    • Communication Interfaces:

      • 2x FDCAN controllers supporting flexible data rate

      • 3x I2C Fast Mode Plus (1 Mbit/s) with 20 mA current sink, SMBus/PMBus support

      • 5x USART/UART (ISO 7816, LIN, IrDA, modem control)

      • 1x LPUART

      • 3x SPI interfaces (2x with multiplexed half-duplex I²S)

      • 1x SAI (serial audio interface)

      • USB 2.0 full-speed with LPM and BCD support

      • IRTIM (infrared interface)

      • USB Type-C™ / USB Power Delivery (UCPD)

    • Other Peripherals:

      • 16-channel DMA controller

      • True Random Number Generator (RNG)

      • CRC calculation unit, 96-bit unique ID

      • Development support: SWD, JTAG, Embedded Trace Macrocell™

      • ECOPACK2® compliant packages

  • 128 KB Fujitsu MB85RS1MT FRAM: Local storage for data logging, allowing non-volatile memory storage.

  • FTDI FT231XQ USB to UART converter: Provides a reliable USB to UART interface.

More information about STM32G491RE can be found here:

Other board’s peripherals:

  • USB-C Connector: For data and power.

  • SHT45 sensor:

    • Relative humidity accuracy: ±1.0% RH

    • Operating humidity range: 0-100% RH

    • Temperature accuracy: ±0.1°C

    • Operating temperature range: -40°C to 125°C

  • BME280 sensor:

    • Relative humidity accuracy: ±3% RH

    • Temperature accuracy: ±1°C

    • Pressure accuracy: ±1 hPa

    • Operating temperature range: -40°C to 85°C

    • Pressure range: 300-1100 hPa

  • QWIIC connectors: For easy peripheral expansion.

Supported Features

The myra_sip_baseboard board supports the hardware features listed below.

on-chip / on-board
Feature integrated in the SoC / present on the board.
2 / 2
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.
vnd,foo
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
myra_sip_baseboard
/
myra

Type

Location

Description

Compatible

CPU

on-chip

ARM Cortex-M4F CPU1

arm,cortex-m4f

ADC

on-chip

STM32 ADC1 2

st,stm32-adc

CAN

on-chip

STM32 FDCAN CAN FD controller1 1

st,stm32-fdcan

Clock control

on-chip

STM32 RCC (Reset and Clock controller)1

st,stm32-rcc

on-chip

STM32 HSE Clock1

st,stm32-hse-clock

on-chip

Generic fixed-rate clock provider2 1

fixed-clock

on-chip

STM32 LSE Clock1

st,stm32-lse-clock

on-chip

STM32G4 main PLL1

st,stm32g4-pll-clock

Counter

on-chip

STM32 counters6

st,stm32-counter

DAC

on-chip

STM32 family DAC1 1

st,stm32-dac

DMA

on-chip

STM32 DMA controller (V2)2

st,stm32-dma-v2

on-chip

STM32 DMAMUX controller1

st,stm32-dmamux

Flash controller

on-chip

STM32 Family flash controller1

st,stm32-flash-controller

GPIO & Headers

on-chip

STM32 GPIO Controller7

st,stm32-gpio

I2C

on-chip

STM32 I2C V2 controller1 2

st,stm32-i2c-v2

Input

on-board

Group of GPIO-bound input keys1

gpio-keys

Interrupt controller

on-chip

ARMv7-M NVIC (Nested Vectored Interrupt Controller)1

arm,v7m-nvic

on-chip

STM32 External Interrupt Controller1

st,stm32-exti

LED

on-board

Group of GPIO-controlled LEDs1

gpio-leds

on-board

Group of PWM-controlled LEDs1

pwm-leds

MTD

on-chip

STM32 flash memory1

st,stm32-nv-flash

on-board

Fixed partitions of a flash (or other non-volatile storage) memory1

fixed-partitions

on-chip

Fujitsu MB85RSXX SPI FRAM1

fujitsu,mb85rsxx

PHY

on-chip

This binding is to be used by all the usb transceivers which are built-in with USB IP1

usb-nop-xceiv

Pin control

on-chip

STM32 Pin controller1

st,stm32-pinctrl

PWM

on-chip

STM32 PWM1 8

st,stm32-pwm

Reset controller

on-chip

STM32 Reset and Clock Control (RCC) Controller1

st,stm32-rcc-rctl

RNG

on-chip

STM32 Random Number Generator1

st,stm32-rng

RTC

on-chip

STM32 RTC1

st,stm32-rtc

Sensors

on-board

BME280 integrated environmental sensor1

bosch,bme280

on-board

Sensirion SHT4x humidity and temperature sensor1

sensirion,sht4x

on-chip

STM32 family TEMP node for production calibrated sensors with two calibration temperatures1

st,stm32-temp-cal

on-chip

STM32 VREF+1

st,stm32-vref

on-chip

STM32 VBAT1

st,stm32-vbat

Serial controller

on-chip

STM32 USART3

st,stm32-usart

on-chip

STM32 UART2

st,stm32-uart

on-chip

STM32 LPUART1

st,stm32-lpuart

SMbus

on-chip

STM32 SMBus controller3

st,stm32-smbus

SPI

on-chip

STM32 SPI controller with embedded Rx and Tx FIFOs1 2

st,stm32-spi-fifo

SRAM

on-chip

Generic on-chip SRAM1

mmio-sram

USB Type-C Port Controller

on-chip

STM32 USB Type-C / Power Delivery1

st,stm32-ucpd

Timer

on-chip

ARMv7-M System Tick1

arm,armv7m-systick

on-chip

STM32 low-power timer (LPTIM)1

st,stm32-lptim

on-chip

STM32 timers3 8

st,stm32-timers

USB

on-chip

STM32 USB controller1

st,stm32-usb

Watchdog

on-chip

STM32 watchdog1

st,stm32-watchdog

on-chip

STM32 system window watchdog1

st,stm32-window-watchdog

Connections and IOs

Antmicro’s Myra SiP Baseboard provides the following default pin mappings for peripherals:

  • LPUART_1_TX : PA2

  • LPUART_1_RX : PA3

  • I2C_1_SCL : PB8

  • I2C_1_SDA : PB9

  • SPI_CS2 : PB2

  • SPI_CS3 : PA7

  • SPI_2_SCK : PB13

  • SPI_2_MISO : PB14

  • SPI_2_MOSI : PB15

  • PWM_2_CH1 : PA5

  • USER_PB : PC13

  • LD2 : PA5

  • ADC1_IN1 : PA0

  • DAC1_OUT1 : PA4

  • USB_MCU_N : PA11

  • USB_MCU_P : PA12

  • SWDIO-JMTS : PA13

  • SWCLK-JTCK : PA14

  • JTDI : PA15

  • JTDO : PB3

  • JTRST : PB4

  • FRAM_HOLD (ACTIVE LOW) : PB10

  • FRAM_WP (ACTIVE LOW) : PB11

  • FRAM_CS (ACTIVE LOW) : PB12

  • GPIO_PC10 : PC10

  • GPIO_PC11 : PC11

  • GPIO_PC12 : PC12

  • PF0_OSC : PF0

System Clock

System clock can be driven by an internal or an external oscillator, as well as by the main PLL clock. By default, system clock is driven by PLL clock at 170MHz (boost mode selected), which in turn, is driven by the 8MHz high speed external oscillator (HSE). While the HSE oscillator is capable of operating at frequencies up to 48 MHz by default, in this configuration, it is specifically set to 8 MHz.

Serial Port

The Myra SiP Baseboard has 5 U(S)ARTs. The Zephyr console output is assigned to LPUART1. The default settings are 115200 8N1.

Programming and Debugging

The myra_sip_baseboard board supports the runners and associated west commands listed below.

flash debug attach debugserver rtt
openocd ✅ (default) ✅ (default)

Applications for the myra_sip_baseboard board target can be built and flashed in the usual way (see Building an Application and Run an Application for more details).

Flashing

This board has a USB-JTAG interface and can be used with OpenOCD.

Connect the Myra SiP Baseboard to your host computer using the USB port, then build and flash the application. Here is an example for Hello World.

# From the root of the zephyr repository
west build -b myra_sip_baseboard samples/hello_world
west flash

Then run a serial host program to connect with the Myra SiP Baseboard, e.g. using picocom:

$ picocom /dev/ttyUSB0 -b 115200

Warning

The board has only one port that is used for both programming and the console. For this reason, it is recommended to set CONFIG_BOOT_DELAY to an arbitrary value. This is especially important when running twister tests on the device. You should then also use the --flash-before and --device-flash-timeout=120 options:

$ scripts/twister --device-testing --device-serial /dev/ttyUSB0 --device-serial-baud 115200 -p myra_sip_baseboard --flash-before --device-flash-timeout=120 -v

Debugging

You can debug an application in the usual way. Here is an example for the Hello World application.

# From the root of the zephyr repository
west build -b myra_sip_baseboard samples/hello_world
west debug