Ai-Thinker M62-12F development board

Board Overview

Ai-Thinker M62-12F development board

Name:

ai_m62_12f

Vendor:

Ai-Thinker Co., Ltd.

Architecture:

riscv

SoC:

bl616c50q2i

Browse board sources

Overview

Ai-M62-12F is a Wi-Fi 6 + BLE5.3 module developed by Shenzhen Ai-Thinker Technology Co., Ltd. The module is equipped with BL616 chip as the core processor, supports Wi-Fi 802.11b/g/n/ax protocol and BLE protocol, and supports Thread protocol. The BL616 system includes a low-power 32-bit RISC-V CPU with floating-point unit, DSP unit, cache and memory, with a maximum dominant frequency of 320M.

Hardware

For more information about the Bouffalo Lab BL-60x MCU:

• Bouffalo Lab BL61x MCU Datasheet

• Bouffalo Lab Development Zone

• ai_m62_12f Schematics

Supported Features

The ai_m62_12f board supports the hardware features listed below.

on-chip / on-board

Feature integrated in the SoC / present on the board.

2 / 2

Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files.

vnd,foo

Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.

ai_m62_12f/bl616c50q2i target

Type	Location	Description	Compatible
Clock control	on-chip	Generic fixed-rate clock provider2	fixed-clock
	on-chip	The BL61x WIFI PLL1	bflb,bl61x-wifipll
	on-chip	The BL61x Audio PLL1	bflb,bl61x-aupll
	on-chip	The BL61x Root Clock Represents both FCLK and HCLK, which should be kept the same1	bflb,bl61x-root-clk
	on-chip	The BCLK clock, or peripheral clock Source Clock -> Root Clock -> / divider -> BCLK1	bflb,bclk
	on-chip	The BL61x Flash Clock Source -> divider -> CLK Only has settings for Bank 1 (boot flash) at the moment1	bflb,bl61x-flash-clk
	on-chip	Bouffalolab BL61x Clock Controller1	bflb,bl61x-clock-controller
Flash controller	on-chip	Bouffalolab Flash Controller1	bflb,flash-controller
GPIO & Headers	on-chip	BouffaloLab GPIO node for BL61X serie1	bflb,bl61x-gpio
Input	on-board	Group of GPIO-bound input keys1	gpio-keys
Interrupt controller	on-chip	Nuclei ECLIC interrupt controller1	nuclei,eclic
LED	on-board	Group of GPIO-controlled LEDs1	gpio-leds
MTD	on-board	Flash node1	soc-nv-flash
	on-board	Fixed partitions of a flash (or other non-volatile storage) memory1	fixed-partitions
Pin control	on-chip	Bouffalo Lab Pinctrl node1	bflb,pinctrl
Serial controller	on-chip	Bouffalo Lab UART1 1	bflb,uart
SRAM	on-chip	Generic on-chip SRAM2	mmio-sram
System controller	on-chip	BouffaloLab Efuse1	bflb,efuse
Timer	on-chip	RISC-V Machine Timer1	riscv,machine-timer

System Clock

The WB2 (BL602) Development Board is configured to run at max speed (192MHz).

Serial Port

The ai_m62_12f board uses UART0 as default serial port. It is connected to USB Serial converter and port is used for both program and console.

Programming and Debugging

Samples

#. Build the Zephyr kernel and the Hello World sample application:

# From the root of the zephyr repository
west build -b ai_m62_12f samples/hello_world
west flash

1. Run your favorite terminal program to listen for output. Under Linux the terminal should be /dev/ttyUSB0. For example:

   $ screen /dev/ttyUSB0 115200
   

   The -o option tells minicom not to send the modem initialization string. Connection should be configured as follows:

   • Speed: 115200

   • Data: 8 bits

   • Parity: None

   • Stop bits: 1

   Then, press and release RST button

   *** Booting Zephyr OS build v4.2.0 ***
   Hello World! ai_m62_12f/bl616c50q2i
   

Congratulations, you have ai_m62_12f configured and running Zephyr.