Zephyr API Documentation 4.0.0-rc2
A Scalable Open Source RTOS
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stm32_common_clocks.h
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1/*
2 * Copyright (c) 2023 STMicroelectronics
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32_COMMON_CLOCKS_H_
7#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32_COMMON_CLOCKS_H_
8
10#define STM32_SRC_SYSCLK 0x001
12#define STM32_SRC_LSE 0x002
13#define STM32_SRC_LSI 0x003
14
16#define NO_SEL 0xFF
17
19#define STM32_MCO_CFGR_REG_MASK 0xFFFFU
20#define STM32_MCO_CFGR_REG_SHIFT 0U
21#define STM32_MCO_CFGR_SHIFT_MASK 0x3FU
22#define STM32_MCO_CFGR_SHIFT_SHIFT 16U
23#define STM32_MCO_CFGR_MASK_MASK 0x1FU
24#define STM32_MCO_CFGR_MASK_SHIFT 22U
25#define STM32_MCO_CFGR_VAL_MASK 0x1FU
26#define STM32_MCO_CFGR_VAL_SHIFT 27U
27
42#define STM32_MCO_CFGR(val, mask, shift, reg) \
43 ((((reg) & STM32_MCO_CFGR_REG_MASK) << STM32_MCO_CFGR_REG_SHIFT) | \
44 (((shift) & STM32_MCO_CFGR_SHIFT_MASK) << STM32_MCO_CFGR_SHIFT_SHIFT) | \
45 (((mask) & STM32_MCO_CFGR_MASK_MASK) << STM32_MCO_CFGR_MASK_SHIFT) | \
46 (((val) & STM32_MCO_CFGR_VAL_MASK) << STM32_MCO_CFGR_VAL_SHIFT))
47
55#define STM32_CLOCK(bus, bit) (STM32_CLOCK_BUS_##bus) (1 << bit)
56
57#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_STM32_COMMON_CLOCKS_H_ */