Zephyr API Documentation 4.0.0-rc2
A Scalable Open Source RTOS
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Driver for Platform Level Interrupt Controller (PLIC) More...
#include <zephyr/device.h>
Go to the source code of this file.
Functions | |
void | riscv_plic_irq_enable (uint32_t irq) |
Enable interrupt. | |
void | riscv_plic_irq_disable (uint32_t irq) |
Disable interrupt. | |
int | riscv_plic_irq_is_enabled (uint32_t irq) |
Check if an interrupt is enabled. | |
void | riscv_plic_set_priority (uint32_t irq, uint32_t prio) |
Set interrupt priority. | |
int | riscv_plic_irq_set_affinity (uint32_t irq, uint32_t cpumask) |
Set IRQ affinity. | |
void | riscv_plic_irq_set_pending (uint32_t irq) |
Set interrupt as pending. | |
unsigned int | riscv_plic_get_irq (void) |
Get active interrupt ID. | |
const struct device * | riscv_plic_get_dev (void) |
Get active interrupt controller device. | |
Driver for Platform Level Interrupt Controller (PLIC)
const struct device * riscv_plic_get_dev | ( | void | ) |
Get active interrupt controller device.
unsigned int riscv_plic_get_irq | ( | void | ) |
Get active interrupt ID.
void riscv_plic_irq_disable | ( | uint32_t | irq | ) |
Disable interrupt.
irq | Multi-level encoded interrupt ID |
void riscv_plic_irq_enable | ( | uint32_t | irq | ) |
Enable interrupt.
irq | Multi-level encoded interrupt ID |
int riscv_plic_irq_is_enabled | ( | uint32_t | irq | ) |
Check if an interrupt is enabled.
irq | Multi-level encoded interrupt ID |
Set IRQ affinity.
irq | IRQ line. |
cpumask | CPU bit mask. |
void riscv_plic_irq_set_pending | ( | uint32_t | irq | ) |
Set interrupt as pending.
irq | Multi-level encoded interrupt ID |