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◆ MAX32_DMA_SLOT_AES_RX
#define MAX32_DMA_SLOT_AES_RX 0x10U |
◆ MAX32_DMA_SLOT_AES_TX
#define MAX32_DMA_SLOT_AES_TX 0x30U |
◆ MAX32_DMA_SLOT_CRC
#define MAX32_DMA_SLOT_CRC 0x2CU |
◆ MAX32_DMA_SLOT_I2C_CONTROLLER_RX
#define MAX32_DMA_SLOT_I2C_CONTROLLER_RX 0x07U |
◆ MAX32_DMA_SLOT_I2C_CONTROLLER_TX
#define MAX32_DMA_SLOT_I2C_CONTROLLER_TX 0x27U |
◆ MAX32_DMA_SLOT_I2C_TARGET_RX
#define MAX32_DMA_SLOT_I2C_TARGET_RX 0x08U |
◆ MAX32_DMA_SLOT_I2C_TARGET_TX
#define MAX32_DMA_SLOT_I2C_TARGET_TX 0x28U |
◆ MAX32_DMA_SLOT_I3C_CONTROLLER_RX
#define MAX32_DMA_SLOT_I3C_CONTROLLER_RX 0x07U |
◆ MAX32_DMA_SLOT_I3C_CONTROLLER_TX
#define MAX32_DMA_SLOT_I3C_CONTROLLER_TX 0x27U |
◆ MAX32_DMA_SLOT_I3C_TARGET_RX
#define MAX32_DMA_SLOT_I3C_TARGET_RX 0x08U |
◆ MAX32_DMA_SLOT_I3C_TARGET_TX
#define MAX32_DMA_SLOT_I3C_TARGET_TX 0x28U |
◆ MAX32_DMA_SLOT_MEMTOMEM
#define MAX32_DMA_SLOT_MEMTOMEM 0x00U |
◆ MAX32_DMA_SLOT_SPI_RX
#define MAX32_DMA_SLOT_SPI_RX 0x01U |
◆ MAX32_DMA_SLOT_SPI_TX
#define MAX32_DMA_SLOT_SPI_TX 0x21U |
◆ MAX32_DMA_SLOT_UART_RX
#define MAX32_DMA_SLOT_UART_RX 0x04U |
◆ MAX32_DMA_SLOT_UART_TX
#define MAX32_DMA_SLOT_UART_TX 0x24U |