Go to the source code of this file.
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#define | CH32V00X_HB_PCENR_OFFSET 0 |
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#define | CH32V00X_PB2_PCENR_OFFSET 1 |
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#define | CH32V00X_PB1_PCENR_OFFSET 2 |
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#define | CH32V00X_CLOCK_CONFIG(bus, bit) |
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#define | CH32V00X_CLOCK_DMA1 CH32V00X_CLOCK_CONFIG(HB, 0) |
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#define | CH32V00X_CLOCK_SRAM CH32V00X_CLOCK_CONFIG(HB, 2) |
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#define | CH32V00X_CLOCK_AFIO CH32V00X_CLOCK_CONFIG(PB2, 0) |
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#define | CH32V00X_CLOCK_IOPA CH32V00X_CLOCK_CONFIG(PB2, 2) |
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#define | CH32V00X_CLOCK_IOPB CH32V00X_CLOCK_CONFIG(PB2, 3) |
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#define | CH32V00X_CLOCK_IOPC CH32V00X_CLOCK_CONFIG(PB2, 4) |
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#define | CH32V00X_CLOCK_IOPD CH32V00X_CLOCK_CONFIG(PB2, 5) |
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#define | CH32V00X_CLOCK_ADC1 CH32V00X_CLOCK_CONFIG(PB2, 9) |
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#define | CH32V00X_CLOCK_TIM1 CH32V00X_CLOCK_CONFIG(PB2, 11) |
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#define | CH32V00X_CLOCK_SPI1 CH32V00X_CLOCK_CONFIG(PB2, 12) |
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#define | CH32V00X_CLOCK_USART2 CH32V00X_CLOCK_CONFIG(PB2, 13) |
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#define | CH32V00X_CLOCK_USART1 CH32V00X_CLOCK_CONFIG(PB2, 14) |
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#define | CH32V00X_CLOCK_TIM2 CH32V00X_CLOCK_CONFIG(PB1, 0) |
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#define | CH32V00X_CLOCK_TIM3 CH32V00X_CLOCK_CONFIG(PB1, 2) |
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#define | CH32V00X_CLOCK_WWDG CH32V00X_CLOCK_CONFIG(PB1, 11) |
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#define | CH32V00X_CLOCK_I2C1 CH32V00X_CLOCK_CONFIG(PB1, 21) |
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#define | CH32V00X_CLOCK_PWR CH32V00X_CLOCK_CONFIG(PB1, 28) |
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◆ CH32V00X_CLOCK_ADC1
◆ CH32V00X_CLOCK_AFIO
◆ CH32V00X_CLOCK_CONFIG
#define CH32V00X_CLOCK_CONFIG |
( |
| bus, |
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| bit ) |
Value:(((CH32V00X_##bus##_PCENR_OFFSET) << 5) | (bit))
◆ CH32V00X_CLOCK_DMA1
◆ CH32V00X_CLOCK_I2C1
◆ CH32V00X_CLOCK_IOPA
◆ CH32V00X_CLOCK_IOPB
◆ CH32V00X_CLOCK_IOPC
◆ CH32V00X_CLOCK_IOPD
◆ CH32V00X_CLOCK_PWR
◆ CH32V00X_CLOCK_SPI1
◆ CH32V00X_CLOCK_SRAM
◆ CH32V00X_CLOCK_TIM1
◆ CH32V00X_CLOCK_TIM2
◆ CH32V00X_CLOCK_TIM3
◆ CH32V00X_CLOCK_USART1
◆ CH32V00X_CLOCK_USART2
◆ CH32V00X_CLOCK_WWDG
◆ CH32V00X_HB_PCENR_OFFSET
#define CH32V00X_HB_PCENR_OFFSET 0 |
◆ CH32V00X_PB1_PCENR_OFFSET
#define CH32V00X_PB1_PCENR_OFFSET 2 |
◆ CH32V00X_PB2_PCENR_OFFSET
#define CH32V00X_PB2_PCENR_OFFSET 1 |