Go to the source code of this file.
◆ DMA_PERID_AES_RX
#define DMA_PERID_AES_RX 38 |
◆ DMA_PERID_AES_TX
#define DMA_PERID_AES_TX 37 |
◆ DMA_PERID_AFEC0_RX
#define DMA_PERID_AFEC0_RX 35 |
◆ DMA_PERID_AFEC1_RX
#define DMA_PERID_AFEC1_RX 36 |
◆ DMA_PERID_DACC0_TX
#define DMA_PERID_DACC0_TX 30 |
◆ DMA_PERID_DACC1_TX
#define DMA_PERID_DACC1_TX 31 |
◆ DMA_PERID_HSMCI_TX_RX
#define DMA_PERID_HSMCI_TX_RX 0 |
Atmel SAMx7x Peripheral Hardware Request HW Interface Number (XDMAC_CC.PERID).
See table Table 35-1. Peripheral Hardware Requests in the SAM E70/S70/V70/V71 datasheet.
◆ DMA_PERID_I2SC0_RX_L
#define DMA_PERID_I2SC0_RX_L 45 |
◆ DMA_PERID_I2SC0_RX_R
#define DMA_PERID_I2SC0_RX_R 49 |
◆ DMA_PERID_I2SC0_TX_L
#define DMA_PERID_I2SC0_TX_L 44 |
◆ DMA_PERID_I2SC0_TX_R
#define DMA_PERID_I2SC0_TX_R 48 |
◆ DMA_PERID_I2SC1_RX_L
#define DMA_PERID_I2SC1_RX_L 47 |
◆ DMA_PERID_I2SC1_RX_R
#define DMA_PERID_I2SC1_RX_R 51 |
◆ DMA_PERID_I2SC1_TX_L
#define DMA_PERID_I2SC1_TX_L 46 |
◆ DMA_PERID_I2SC1_TX_R
#define DMA_PERID_I2SC1_TX_R 50 |
◆ DMA_PERID_PIOA_RX
#define DMA_PERID_PIOA_RX 34 |
◆ DMA_PERID_PWM0_TX
#define DMA_PERID_PWM0_TX 13 |
◆ DMA_PERID_PWM1_TX
#define DMA_PERID_PWM1_TX 39 |
◆ DMA_PERID_QSPI_RX
#define DMA_PERID_QSPI_RX 6 |
◆ DMA_PERID_QSPI_TX
#define DMA_PERID_QSPI_TX 5 |
◆ DMA_PERID_SPI0_RX
#define DMA_PERID_SPI0_RX 2 |
◆ DMA_PERID_SPI0_TX
#define DMA_PERID_SPI0_TX 1 |
◆ DMA_PERID_SPI1_RX
#define DMA_PERID_SPI1_RX 4 |
◆ DMA_PERID_SPI1_TX
#define DMA_PERID_SPI1_TX 3 |
◆ DMA_PERID_SSC_RX
#define DMA_PERID_SSC_RX 33 |
◆ DMA_PERID_SSC_TX
#define DMA_PERID_SSC_TX 32 |
◆ DMA_PERID_TC0_RX
#define DMA_PERID_TC0_RX 40 |
◆ DMA_PERID_TC1_RX
#define DMA_PERID_TC1_RX 41 |
◆ DMA_PERID_TC2_RX
#define DMA_PERID_TC2_RX 42 |
◆ DMA_PERID_TC3_RX
#define DMA_PERID_TC3_RX 43 |
◆ DMA_PERID_TWIHS0_RX
#define DMA_PERID_TWIHS0_RX 15 |
◆ DMA_PERID_TWIHS0_TX
#define DMA_PERID_TWIHS0_TX 14 |
◆ DMA_PERID_TWIHS1_RX
#define DMA_PERID_TWIHS1_RX 17 |
◆ DMA_PERID_TWIHS1_TX
#define DMA_PERID_TWIHS1_TX 16 |
◆ DMA_PERID_TWIHS2_RX
#define DMA_PERID_TWIHS2_RX 19 |
◆ DMA_PERID_TWIHS2_TX
#define DMA_PERID_TWIHS2_TX 18 |
◆ DMA_PERID_UART0_RX
#define DMA_PERID_UART0_RX 21 |
◆ DMA_PERID_UART0_TX
#define DMA_PERID_UART0_TX 20 |
◆ DMA_PERID_UART1_RX
#define DMA_PERID_UART1_RX 23 |
◆ DMA_PERID_UART1_TX
#define DMA_PERID_UART1_TX 22 |
◆ DMA_PERID_UART2_RX
#define DMA_PERID_UART2_RX 25 |
◆ DMA_PERID_UART2_TX
#define DMA_PERID_UART2_TX 24 |
◆ DMA_PERID_UART3_RX
#define DMA_PERID_UART3_RX 27 |
◆ DMA_PERID_UART3_TX
#define DMA_PERID_UART3_TX 26 |
◆ DMA_PERID_UART4_RX
#define DMA_PERID_UART4_RX 29 |
◆ DMA_PERID_UART4_TX
#define DMA_PERID_UART4_TX 28 |
◆ DMA_PERID_USART0_RX
#define DMA_PERID_USART0_RX 8 |
◆ DMA_PERID_USART0_TX
#define DMA_PERID_USART0_TX 7 |
◆ DMA_PERID_USART1_RX
#define DMA_PERID_USART1_RX 10 |
◆ DMA_PERID_USART1_TX
#define DMA_PERID_USART1_TX 9 |
◆ DMA_PERID_USART2_RX
#define DMA_PERID_USART2_RX 12 |
◆ DMA_PERID_USART2_TX
#define DMA_PERID_USART2_TX 11 |