st,stm32n6-pinctrl
Vendor: STMicroelectronics
Description
STM32 pin controller with "I/O synchronization"
Identical to the "regular" pin controller with "st,stm32-pinctrl" compatible,
with an additional "I/O synchronization" feature. This feature allows addition
of a programmable delay to the signal input or output path ("I/O delay"), and
synchronization of GPIO data with configuration clock edge(s) ("I/O retime").
This pin controller can be found on STM32N6 series.
Properties
Top level properties
These property descriptions apply to “st,stm32n6-pinctrl” nodes themselves. This page also describes child node properties in the following sections.
Properties not inherited from the base binding file.
Name |
Type |
Details |
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Remaps the PA11 pin to operate as PA9 pin. Use of this property is restricted to STM32G0 and STM32C0 SoCs.
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Remaps the PA12 pin to operate as PA10 pin. Use of this property is restricted to STM32G0 and STM32C0 SoCs.
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Remaps the PA11/PA12 pin to operate as PA9/PA10 pin. Use of this property is restricted to STM32F070x SoCs.
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Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “st,stm32n6-pinctrl” compatible.
Name |
Type |
Details |
|---|---|---|
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Information used to address the device. The value is specific to
the device (i.e. is different depending on the compatible
property).
The "reg" property is typically a sequence of (address, length) pairs.
Each pair is called a "register block". Values are
conventionally written in hex.
For details, see "2.3.6 reg" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
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This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
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Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See Important properties for more information. |
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Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
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Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
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Optional names given to each clock provider in the "clocks" property.
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This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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DMA channel specifiers relevant to the device.
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Optional names given to the DMA channel specifiers in the "dmas" property.
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IO channel specifiers relevant to the device.
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Optional names given to the IO channel specifiers in the "io-channels" property.
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Mailbox / IPM channel specifiers relevant to the device.
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Optional names given to the mbox specifiers in the "mboxes" property.
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Power domain specifiers relevant to the device.
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Optional names given to the power domain specifiers in the "power-domains" property.
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Number of cells in power-domains property
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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Child node properties
Name |
Type |
Details |
|---|---|---|
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Clock edges on which input/output should be retimed
If this property is present, I/O retiming is enabled,
and this property selects whether the input/output data
is retimed on rising, falling or both edges of clock.
If this property is not present, I/O retiming is disabled.
Legal values: |
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Delay applied to input or output path (in picoseconds)
The default value matches hardware default, and allows to keep
the property unspecified on most pinctrl nodes which do not use
the I/O delay feature.
Legal values: |
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Direction in which the I/O delay should be applied
The default value corresponds to hardware default.
Default value: Legal values: |
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Reused from
https://github.com/torvalds/linux/blob/master/Documentation/devicetree/bindings/pinctrl/st,stm32-pinctrl.yaml
Integer represents gpio pin number and mux setting.
Each integer encodes a port, line and alternate function.
With:
- port: The gpio port index (PA = 0, PB = 1, ..., PK = 11)
- line: The line offset within the port (PA0 = 0, PA1 = 1, ..., PA15 = 15)
- function: The function number, can be:
* 0 : Alternate Function 0
* 1 : Alternate Function 1
* 2 : Alternate Function 2
* ...
* 15 : Alternate Function 15
* 16 : Analog
* 17 : GPIO
In case selected pin function is GPIO, pin is statically configured as
a plain input/output GPIO. Default configuration is input. Output value
can be configured by adding 'ouptut-low' or 'output-high' properties
to the pin configuration.
To simplify the usage, macro is available to generate "pinmux" field.
This macro is available here:
-include/zephyr/dt-bindings/pinctrl/stm32-pinctrl.h
Some examples of macro usage:
GPIO A9 set as alternate function 2
... {
pinmux = <STM32_PINMUX('A', 9, AF2)>;
};
GPIO A9 set as analog
... {
pinmux = <STM32_PINMUX('A', 9, ANALOG)>;
};
GPIO A9 set as GPIO output high
... {
pinmux = <STM32_PINMUX('A', 9, GPIO)>;
output-high;
};
This property is required. |
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Pin speed. Default to low-speed. For few pins (PA11 and
PB3 depending on SoCs)hardware reset value could differ
(very-high-speed). Carefully check reference manual for these pins.
Default value: Legal values: |
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disable any pin bias
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enable pull-up resistor
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enable pull-down resistor
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drive actively high and low
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drive with open drain (hardware AND)
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set the pin to output mode with low level
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set the pin to output mode with high level
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