st,stm32-sdmmc

Vendor: STMicroelectronics

Note

An implementation of a driver matching this compatible is available in drivers/disk/sdmmc_stm32.c.

Description

STM32 SDMMC Disk Access

Properties

Properties not inherited from the base binding file.

Name

Type

Details

disk-name

string

Disk name.

This property is required.

resets

phandle-array

Reset information

This property is required.

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

This property is required.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

This property is required.

cd-gpios

phandle-array

Card Detect pin

pwr-gpios

phandle-array

Power pin

bus-width

int

bus width for SDMMC access, defaults to the minimum necessary
number of bus lines

Default value: 1

Legal values: 1, 4, 8

clk-div

int

Clock division factor for SDMMC. The relationship between this value
and the output bus frequency is FREQ_BUS = SDMMMC_CLK / [CLKDIV + 2].
Therefore an input clock of 25MHz and a division factor of 0 would
result in a bus frequency of 25MHz / [0 + 2] = 12.5MHz.

clk-bypass

boolean

Bypass the clock divider configured in `clk-div`, which results in the
output bus frequency matching the input SDMMC_CLK. Not supported on
all part numbers.

idma

boolean

SDMMC device has an internal DMA. Internal DMA doesn't require any additional
configuration using "dmas" property.
Delete this property to use interrupt driven mode.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

reset-names

string-array

Name of each reset