infineon,hppass-csg

Description

Infineon HPPASS Comparator Slope Generator (CSG) MFD.

The CSG block within the HPPASS subsystem contains multiple identical
slices, each pairing a 10-bit 30 Msps DAC with a high-speed comparator.
This MFD driver owns the combined comparator interrupt and dispatches
per-slice callbacks to child comparator and DAC devices.

This node must be a child of an "infineon,hppass-analog" parent.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

clk-dst

int

PDL clock destination index (en_clk_dst_t) for the CSG peripheral
clock assignment.

This property is required.

infineon,num-slices

int

Number of CSG slices present in this instance.

This property is required.

Value range: 1 to 8

infineon,slice-reg-spacing

int

Byte stride between consecutive slice register sets.

This property is required.

infineon,dac-observe-blank-cycles

int

Number of DAC output blanking cycles (VDAC_OUT_BLANK.BLANK_CNT)
applied when the DAC observability route is switched.

Default value: 0

Value range: 0 to 31