openhwgroup,erbium-mram-controller

Description

Erbium AXI-to-MRAM bridge and per-bank controller registers. The controller
provides configuration, ECC status and bank test registers for the 16 MiB
MRAM data window.

The CPU register map and interrupt routing are documented at:
https://github.com/openhwfoundation/core-et-erbium/blob/325b32b7efaa2c2ab9c91001c89d3f49a4740826/doc/cpu_mm.md
https://github.com/openhwfoundation/core-et-erbium/blob/325b32b7efaa2c2ab9c91001c89d3f49a4740826/doc/interrupts.md

Properties

Properties not inherited from the base binding file.

(None)