nxp,s32-siul2-eirq

Vendor: NXP Semiconductors

Note

An implementation of a driver matching this compatible is available in drivers/interrupt_controller/intc_eirq_nxp_s32.c.

Description

NXP S32 SIUL2 External Interrupts Request controller

Properties

Top level properties

These property descriptions apply to “nxp,s32-siul2-eirq” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

Name

Type

Details

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

This property is required.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

This property is required.

filter-prescaler

int

Interrupt filter clock prescaler. The prescaler is applied to the input
clock to SIUL2, which is the peripheral clock counter in the SIUL2.
The prescaled filter clock period is:
  TIRC * (IFCP + 1)
where:
  * TIRC is the internal oscillator period.
  * IFCP is 0 to 15.

Legal values: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15

interrupt-controller

boolean

Convey's this node is an interrupt controller

This property is required.

#interrupt-cells

int

Number of items to expect in an interrupt specifier

This property is required.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

Child node properties

Name

Type

Details

max-filter-counter

int

Maximum Interrupt Filter Counter setting. This value configures the
filter counter associated with the digital glitch filter.
A value of 0 to 2, sets the filter as an all pass filter.
A value of 3 to 15, sets the filter period to (TCK * MAXCNT + n * TCK),
where:
  * n can be in the range 0 to 4, and accounts for the uncertainty
    factor in filter period calculation.
  * TCK is the prescaled filter clock period.

This property is required.

Legal values: 0, 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15

Specifier cell names

  • interrupt cells: gpio-pin, eirq-line