microchip,eic-g1-intc
Description
Microchip EIC G1 device
The Microchip G1 External Interrupt Controller (EIC) device provides interrupt
support for GPIO pins on Microchip G1 group of devices. As the mapping between
GPIO pins and EIC interrupt lines differs across devices, the devicetree
properties describes device-specific interrupt capabilities instead of hardcoding
them.
The devicetree binding provides the hardware-specific information including:
- GPIO pins that support external interrupts.
- GPIO pins that do not support external interrupts.
- GPIO pins whose EIC line mapping differs from the default mapping.
Group g1 EIC supports following hardware peripherals:
- module name="EIC" id="U2254" version="3.0.0"
Examples
/*
* The following example shows an EIC node in the SoC devicetree. The
* *-supported-pins and *-unsupported-pins properties describe the
* interrupt capabilities of GPIO pins for each port.
*
* The *-special-pins-* properties are used for GPIO pins whose EIC line
* cannot be derived directly from the pin number (for example, using
* pin_number % 16). Each entry consists of a pin bitmask and an offset.
*
* GPIO pins can be configured for interrupt operation using the standard
* Zephyr GPIO APIs in the same way as any other GPIO pin.
*/
eic: interrupt-controller@40001800 {
compatible = "microchip,eic-g1-intc";
reg = <0x40001800 0x400>;
interrupts = <20>;
interrupt-controller;
#interrupt-cells = <2>;
porta-unsupported-pins = <0x00000030>;
portc-supported-pins = <0x00FF0000>;
portc-special-pins-1 = <0x03000000 16>;
};
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
|---|---|---|
|
|
Enables low power mode for eic peripheral
|
|
|
Each bit in the property denotes a pin number. This shows the pins which
do not support interrupt for port a.
Default value: |
|
|
Each bit in the property denotes a pin number. This shows the pins which
do not support interrupt for portb.
Default value: |
|
|
Each bit in the property denotes a pin number. This shows the pins which
do not support interrupt for portc.
Default value: |
|
|
Each bit in the property denotes a pin number. This shows the pins which
support interrupt in portc
Default value: |
|
|
Each bit in the property denotes a pin number. This shows the pins which
support interrupt in portd
Default value: |
|
|
Each bit in this number denotes a pin number. These pins are derived from datasheet
by listing down the eic line and port-pin mapping.
The eic line mapping to the pin number requires a manipulation with an offset.
Default value: |
|
|
Number of cells in portb-special-pins-1 property
Default value: |
|
|
Each bit in this number denotes a pin number. These pins are derived from datasheet
by listing down the eic line and port-pin mapping.
The eic line mapping to the pin number requires a manipulation with an offset.
Default value: |
|
|
Number of cells in portb-special-pins-1 property
Default value: |
|
|
Each bit in this number denotes a pin number. These pins are derived from datasheet
The eic line mapping to the pin number requires a manipulation with an offset.
Default value: |
|
|
Number of cells in portc-special-pins-1 property
Default value: |
|
|
Each bit in this number denotes a pin number. These pins are derived from datasheet
The eic line mapping to the pin number requires a manipulation with an offset.
Default value: |
|
|
Number of cells in portc-special-pins-1 property
Default value: |
|
|
Each bit in this number denotes a pin number. These pins are derived from datasheet
The eic line mapping to the pin number requires a manipulation with an offset.
Default value: |
|
|
Number of cells in portd-special-pins-1 property
Default value: |
|
|
Each bit in this number denotes a pin number. These pins are derived from datasheet
The eic line mapping to the pin number requires a manipulation with an offset.
Default value: |
|
|
Number of cells in portd-special-pins-2 property
Default value: |
Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “microchip,eic-g1-intc” compatible.
Name |
Type |
Details |
|---|---|---|
|
|
Specifies the base address and size of the register
block of external interrupt controller.
This property is required. See Important properties for more information. |
|
|
Specifies the interrupt line in the NVIC
This property is required. See Important properties for more information. |
|
|
Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
|
|
This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
|
|
Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
|
|
|
Information used to define a mapping (or translation) between the address
space of a bus (the "child address space") and the address space of the
bus node's parent (the "parent address space").
The "ranges" property is typically empty, or a sequence of triplets
(child bus address, parent bus address, length).
If the "ranges" property is empty, it specifies that the parent and child
address spaces are identical and no address translation is required.
If the "ranges" property is not present in a bus node, it is assumed that
no mapping exists between children of the node and the parent address space.
For details, see "2.3.8 ranges" in Devicetree Specification v0.4.
|
|
|
Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
|
|
|
Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
|
|
|
If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
|
|
|
Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
|
|
Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
|
|
|
Optional names given to each clock provider in the "clocks" property.
|
|
|
This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
|
|
|
This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
|
|
|
Indicates that the device is capable of coherent DMA operations.
For details, see "2.3.10 dma-coherent" in Devicetree Specification v0.4.
|
|
|
DMA channel specifiers relevant to the device.
|
|
|
Optional names given to the DMA channel specifiers in the "dmas" property.
|
|
|
IO channel specifiers relevant to the device.
|
|
|
Optional names given to the IO channel specifiers in the "io-channels" property.
|
|
|
Mailbox / IPM channel specifiers relevant to the device.
|
|
|
Optional names given to the mbox specifiers in the "mboxes" property.
|
|
|
Power domain specifiers relevant to the device.
|
|
|
Optional names given to the power domain specifiers in the "power-domains" property.
|
|
|
Number of cells in power-domains property
|
|
|
HW spinlock id relevant to the device.
|
|
|
Optional names given to the hwlock specifiers in the "hwlocks" property.
|
|
|
Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
|
|
|
Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
|
|
|
Automatically configure the device for runtime power management after the
init function runs.
|
|
|
List of power states that will disable this device power.
|
Specifier cell names
portb-special-pins-1 cells: pins_val, offset
portc-special-pins-1 cells: pins_val, offset
portd-special-pins-1 cells: pins_val, offset
portd-special-pins-2 cells: pins_val, offset