arduino-mega-header
Description
GPIO pins exposed on Arduino Mega (rev3) headers
The Arduino Mega layout provides six headers, three each along
opposite edges of the board.
Proceeding counter-clockwise:
* An 8-pin Power Supply header. No pins on this header are exposed
by this binding.
* An 8-pin Analog Input header. This has analog input signals
labeled from A0 at the top through A7 at the bottom.
* Another 8-pin Analog Input header. This has eight additional analog
input signals labeled from A8 at the top through A15 at the bottom.
* An 8-pin header (opposite the second Analog Input header). This has
digital input signals labeled in decreasing order from D21 at the bottom
to D14 at the top.
* Another 8-pin header (opposite the first Analog Input header). This has
digital input signals labeled from D0 at the bottom to D7 at the top.
* A 10-pin header (opposite Power Supply). This has six additional
digital input signals labelled from D8 at the bottom through D13
towards the top, skipping two pins (GND and AREF), then finishing with
SDA1 and SCL1 at the top.
This binding provides a nexus mapping for 40 pins, extending the mapping of
the Arduino Uno (R3) header.
The pins overlapping between Arduino Mega and Arduino Uno have the following
parent pin mapping:
* Parent pins 0 through 5 correspond to A0 through A5.
* Parent pins 6 through 19 correspond to D0 through D13.
* Parent pins 20 and 21 correspond to SDA1 and SCL1.
The additional pins of Arduino Mega have the following parent pin mapping:
* Parent pins 22 through 27 correspond to D14 through D19.
* Parent pins 28 and 29 correspond to D20 and D21.
* Parent pins 30 and 31 correspond to A6 and A7.
* Parent pins 32 through 39 correspond to A8 through A15.
The parent pin mapping and their physical layout are depicted below:
SCL1 21
SDA1 20
AREF -
GND -
- N/C D13 19
- IOREF D12 18
- RESET D11 17
- 3V3 D10 16
- 5V D9 15
- GND D8 14
- GND
- VIN D7 13
D6 12
0 A0 D5 11
1 A1 D4 10
2 A2 D3 9
3 A3 D2 8
4 A4 D1 7
5 A5 D0 6
30 A6
31 A7 D14 22
D15 23
32 A8 D16 24
33 A9 D17 25
34 A10 D18 26
35 A11 D19 27
36 A12 D20 28
37 A13 D21 29
38 A14
39 A15
Use ARDUINO_MEGA_HEADER_* constants in <zephyr/dt-bindings/gpio/arduino-mega-header.h>
to refer to specific pins using convenient constant names.
Properties
Properties not inherited from the base binding file.
Name |
Type |
Details |
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This property is required. |
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Number of items to expect in a GPIO specifier
This property is required. |
Deprecated properties not inherited from the base binding file.
(None)
Properties inherited from the base binding file, which defines common properties that may be set on many nodes. Not all of these may apply to the “arduino-mega-header” compatible.
Name |
Type |
Details |
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Indicates the operational status of the hardware or other
resource that the node represents. In particular:
- "okay" means the resource is operational and, for example,
can be used by device drivers
- "disabled" means the resource is not operational and the system
should treat it as if it is not present
For details, see "2.3.4 status" in Devicetree Specification v0.4.
Legal values: See Important properties for more information. |
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This property is a list of strings that essentially define what
type of hardware or other resource this devicetree node
represents. Each device driver checks for specific compatible
property values to find the devicetree nodes that represent
resources that the driver should manage.
The recommended format is "vendor,device", The "vendor" part is
an abbreviated name of the vendor. The "device" is usually from
the datasheet.
The compatible property can have multiple values, ordered from
most- to least-specific. Having additional values is useful when the
device is a specific instance of a more general family, to allow the
system to match the most specific driver available.
For details, see "2.3.1 compatible" in Devicetree Specification v0.4.
This property is required. See Important properties for more information. |
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Information used to address the device. The value is specific to
the device (i.e. is different depending on the compatible
property).
The "reg" property is typically a sequence of (address, length) pairs.
Each pair is called a "register block". Values are
conventionally written in hex.
For details, see "2.3.6 reg" in Devicetree Specification v0.4.
See Important properties for more information. |
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Optional names given to each register block in the "reg" property.
For example:
/ {
soc {
#address-cells = <1>;
#size-cells = <1>;
uart@1000 {
reg = <0x1000 0x2000>, <0x3000 0x4000>;
reg-names = "foo", "bar";
};
};
};
The uart@1000 node has two register blocks:
- one with base address 0x1000, size 0x2000, and name "foo"
- another with base address 0x3000, size 0x4000, and name "bar"
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Information about interrupts generated by the device, encoded as an array
of one or more interrupt specifiers. The format of the data in this property
varies by where the device appears in the interrupt tree. Devices with the same
"interrupt-parent" will use the same format in their interrupts properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
See Important properties for more information. |
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Extended interrupt specifier for device, used as an alternative to
the "interrupts" property.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Optional names given to each interrupt generated by a device.
The interrupts themselves are defined in either "interrupts" or
"interrupts-extended" properties.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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If present, this refers to the node which handles interrupts generated
by this device.
For details, see "2.4 Interrupts and Interrupt Mapping" in
Devicetree Specification v0.4.
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Human readable string describing the device. Use of this property is
deprecated except as needed on a case-by-case basis.
For details, see "4.1.2 Miscellaneous Properties" in Devicetree
Specification v0.4.
See Important properties for more information. |
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Information about the device's clock providers. In general, this property
should follow conventions established in the dt-schema binding:
https://github.com/devicetree-org/dt-schema/blob/main/dtschema/schemas/clock/clock.yaml
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Optional names given to each clock provider in the "clocks" property.
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This property encodes the number of <u32> cells used by address fields
in "reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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This property encodes the number of <u32> cells used by size fields in
"reg" properties in this node's children.
For details, see "2.3.5 #address-cells and #size-cells" in Devicetree
Specification v0.4.
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DMA channel specifiers relevant to the device.
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Optional names given to the DMA channel specifiers in the "dmas" property.
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IO channel specifiers relevant to the device.
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Optional names given to the IO channel specifiers in the "io-channels" property.
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Mailbox / IPM channel specifiers relevant to the device.
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Optional names given to the mbox specifiers in the "mboxes" property.
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Power domain specifiers relevant to the device.
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Optional names given to the power domain specifiers in the "power-domains" property.
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Number of cells in power-domains property
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HW spinlock id relevant to the device.
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Optional names given to the hwlock specifiers in the "hwlocks" property.
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Do not initialize device automatically on boot. Device should be manually
initialized using device_init().
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Property to identify that a device can be used as wake up source.
When this property is provided a specific flag is set into the
device that tells the system that the device is capable of
wake up the system.
Wake up capable devices are disabled (interruptions will not wake up
the system) by default but they can be enabled at runtime if necessary.
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Automatically configure the device for runtime power management after the
init function runs.
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List of power states that will disable this device power.
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