st,stm32-qspi-nor (on qspi bus)

Vendor: STMicroelectronics

Note

An implementation of a driver matching this compatible is available in drivers/flash/flash_stm32_qspi.c.

Description

STM32 QSPI Flash controller supporting the JEDEC CFI interface

Representation of a serial flash on a quadspi bus:

    mx25r6435f: qspi-nor-flash@90000000 {
            compatible = "st,stm32-qspi-nor";
            reg = <0x90000000 DT_SIZE_M(8)>; /* 64 Mbits */
            qspi-max-frequency = <80000000>;
            reset-gpios = <&gpiod 3 GPIO_ACTIVE_LOW>;
            reset-gpios-duration = <1>;
            spi-bus-width = <4>;
            status = "okay";
    };

Properties

Properties not inherited from the base binding file.

Name

Type

Details

qspi-max-frequency

int

 
Maximum clock frequency of device's QSPI interface in Hz

This property is required.

reset-gpios

phandle-array

 
RESETn pin

reset-gpios-duration

int

 
The duration (in ms) for the flash memory reset pulse

reset-cmd

boolean

 
Send reset command on initialization

reset-cmd-wait

int

 
The duration (in us) to wait after reset command

Default value: 10

spi-bus-width

int

 
The width of (Q)SPI bus to which flash memory is connected. Now only value of 4 (when using SIO[0123]) is supported.

writeoc

string

 
The value encodes number of I/O lines used for the opcode,
address, and data.

There is no info about quad page program opcodes in the SFDP
tables, hence it has been assumed that NOR flash memory
supporting 1-4-4 mode also would support fast page programming.

If absent, then 1-4-4 program page is used in quad mode.

Legal values: 'PP_1_1_4', 'PP_1_4_4'

requires-ulbpr

boolean

 
Indicates the device requires the ULBPR (0x98) command.

Some flash chips such as the Microchip SST26VF series have a block
protection register that initializes to write-protected.  Use this
property to indicate that the BPR must be unlocked before write
operations can proceed.

jedec-id

uint8-array

 
JEDEC ID as manufacturer ID, memory type, memory density

size

int

 
flash capacity in bits

sfdp-bfp

uint8-array

 
Contains the 32-bit words in little-endian byte order from the
JESD216 Serial Flash Discoverable Parameters Basic Flash
Parameters table.  This provides flash-specific configuration
information in cases were runtime retrieval of SFDP data
is not desired.

quad-enable-requirements

string

 
Quad Enable Requirements value from JESD216 BFP DW15.

Use NONE if the device detects 1-1-4 and 1-4-4 modes by the
instruction.  Use S1B6 if QE is bit 6 of the first status register
byte, and can be configured by reading then writing one byte with
RDSR and WRSR.  For other fields see the specification.

Legal values: 'NONE', 'S2B1v1', 'S1B6', 'S2B7', 'S2B1v4', 'S2B1v5', 'S2B1v6'

enter-4byte-addr

int

 
Enter 4-Byte Addressing value from JESD216 BFP DW16

This property is ignored if the device is configured to use SFDP data
from the sfdp-bfp property (CONFIG_SPI_NOR_SFDP_DEVICETREE) or to read
SFDP properties at runtime (CONFIG_SPI_NOR_SFDP_RUNTIME).

For CONFIG_SPI_NOR_SFDP_MINIMAL this is the 8-bit value from bits 31:24
of DW16 identifying ways a device can be placed into 4-byte addressing
mode.  If provided as a non-zero value the driver assumes that 4-byte
addressing is require to access the full address range, and
automatically puts the device into 4-byte address mode when the device
is initialized.

page-size

int

 
Number of bytes in a page from JESD216 BFP DW11

This property is only used in the CONFIG_SPI_NOR_SFDP_MINIMAL configuration.
It is ignored if the device is configured to use SFDP data
from the sfdp-bfp property (CONFIG_SPI_NOR_SFDP_DEVICETREE) or
if the SFDP parameters are read from the device at
runtime (CONFIG_SPI_NOR_SFDP_RUNTIME).

The default value is 256 bytes if the value is not specified.