solomon,ssd1363 (on mipi-dbi bus)

Vendor: Solomon Systech Limited

Description

SSD1363 320x160 dot-matrix display controller on MIPI DBI bus

Properties

Properties not inherited from the base binding file.

Name

Type

Details

oscillator-freq

int

Front clock divider (3:0) / oscillator frequency (7:4). It can be set to 0x0. If you get weird scanlines, increase oscillator frequency and play with phase length values, for example set this to 0x70. Note this increases power consumption.

This property is required.

display-offset

int

Vertical offset by com from 0 ~ 159. Typically 160 - height.

This property is required.

start-line

int

Start line of display RAM to be displayed by selecting a value from 0 to 159. Typically 0.

This property is required.

multiplex-ratio

int

Multiplex ratio from 3MUX to 159MUX. Typically same value as height - 1.

This property is required.

remap-value

int

Remap register of 16-bits length
Has multiple configurations (see each bit setting in the datasheet) first byte [15:8] - A[0] 0 is htiled, 1 is vtiled - A[1] invert SEG mapping - A[3] reserved - A[4] Invert COM - A[5] Sequential (0) or Alternative (Odd/Even) COMs second byte [7:0] - B[0] reserved - B[4] Dual COM mode (mux <= 79)
A[5] is needed when display has striping.

This property is required.

phase-length

int

Phase Length for segment charging (7:4) and discharging (3:0). Good values to try first are 0x1f and 0xf1.

This property is required.

column-offset

int

Offset in columns. Typically (320 - width) / 2. This is done in software as SSD1363 lacks hardware tooling for this.

This property is required.

precharge-period

int

Second pre-charge period ranging from 0 to 15 DCLK's.

This property is required.

internal-iref

int

Internal or external iref. 0x80 is External, 0x90 Internal. Most displays use Internal.

Default value: 144

precharge-config

int

Vp pin floating (0x2) or linked to external capacitance (0x3). Most displays use a external capacitor.

Default value: 3

precharge-voltage

int

Set precharge voltage (4:0) from 0.10 x VCC to 0.513 x VCC (0x1F). 0x7 is the reset default.

Default value: 7

vcomh-voltage

int

Set COM deselect voltage (3:0) from 0.72 x VCC (0x0) to 0.86 x VCC (0x7) 0x4 is the reset default.

Default value: 4

inversion-on

boolean

Turn on display color inverting

greyscale-enhancement

boolean

Enable greyscale enhancement, undocumented.

greyscale-table

uint8-array

15 elements array defines gamma settings for each brightness levels. It seems last element must always be 60/0x3C.

height

int

Height of the panel driven by the controller, with the units in pixels.

This property is required.

width

int

Width of the panel driven by the controller, with the units in pixels.

This property is required.

duplex

int

SPI Duplex mode, full or half. By default it's always full duplex thus 0
as this is, by far, the most common mode.
Selecting half duplex allows to use SPI MOSI as a bidirectional line,
typically used when only one data line is connected.
Use the macros, not the actual enum value. Here is the concordance
list (see dt-bindings/spi/spi.h)
  0    SPI_FULL_DUPLEX
  2048 SPI_HALF_DUPLEX

mipi-cpol

boolean

SPI clock polarity which indicates the clock idle state.
If it is used, the clock idle state is logic high; otherwise, low.

mipi-cpha

boolean

SPI clock phase that indicates on which edge data is sampled.
If it is used, data is sampled on the second edge; otherwise, on the first edge.

mipi-hold-cs

boolean

In some cases, it is necessary for the master to manage SPI chip select
under software control, so that multiple spi transactions can be performed
without releasing it. A typical use case is variable length SPI packets
where the first spi transaction reads the length and the second spi transaction
reads length bytes.

mipi-max-frequency

int

Maximum clock frequency of device's MIPI interface in Hz

mipi-mode

string

MIPI DBI mode in use. These definitions should match those in
dt-bindings/mipi_dbi/mipi_dbi.h

Legal values: 'MIPI_DBI_MODE_SPI_3WIRE', 'MIPI_DBI_MODE_SPI_4WIRE', 'MIPI_DBI_MODE_6800_BUS_16_BIT', 'MIPI_DBI_MODE_6800_BUS_9_BIT', 'MIPI_DBI_MODE_6800_BUS_8_BIT', 'MIPI_DBI_MODE_8080_BUS_16_BIT', 'MIPI_DBI_MODE_8080_BUS_9_BIT', 'MIPI_DBI_MODE_8080_BUS_8_BIT'

te-mode

string

MIPI DBI tearing enable signal mode. Defaults to disabled.

Default value: MIPI_DBI_TE_NO_EDGE

Legal values: 'MIPI_DBI_TE_NO_EDGE', 'MIPI_DBI_TE_RISING_EDGE', 'MIPI_DBI_TE_FALLING_EDGE'

te-delay

int

Delay in microseconds to wait before transmitting display data after a
tearing enable synchronization signal is seen. Defaults to 0 since most
controllers will not need a delay.

supply-gpios

phandle-array

GPIO specifier that controls power to the device.

This property should be provided when the device has a dedicated
switch that controls power to the device.  The supply state is
entirely the responsibility of the device driver.

Contrast with vin-supply.

vin-supply

phandle

Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.

This property should be provided when device power is supplied
by a shared regulator.  The supply state is dependent on the
request status of all devices fed by the regulator.

Contrast with supply-gpios.  If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.