silabs,vdac

Vendor: Silicon Laboratories

Note

An implementation of a driver matching this compatible is available in drivers/dac/dac_silabs_vdac.c.

Description

Silicon Labs Series 2 VDAC (Voltage Digital-to-Analog Converter)


The VDAC has two channels, a resolution of 12-bit and a configurable output
range from 0V to 2.5V.

The minimal default configuration for the Silabs VDAC node is as follows:

  #include <zephyr/dt-bindings/dac/silabs-vdac.h>

  &vdac0 {
    status = "okay";
    voltage-reference = "2.5V";
    channel@0 {
      reg = <0>;
      main-output;
    };
  };

Using the main output is the preferred way for any DAC output. Defines like
`VDAC0_CH0_MAIN_OUT_PIN` exists in em_device.h to get the dedicated pin for
your device.

It is also possible to use the auxiliary output to route the output to other
peripherals like the IADC or the ACMP, or to the analog bus to output on any GPIO.
Note that the analog bus multiplexer adds significant impedance, and this option
may not be suitable for certain loads or dynamic conditions.

To connect the analog bus to a GPIO, the `pinctrl` driver must be configured to
allocate an analog bus corresponding to the port and pin of each GPIO input selected.
The following is an example of how that can be configured:

  #include <zephyr/dt-bindings/pinctrl/silabs/xg24-pinctrl.h>
  #include <zephyr/dt-bindings/dac/silabs-vdac.h>

  &pinctrl {
    vdac0_default: vdac0_default {
      group0 {
        silabs,analog-bus = <ABUS_CDODD0_VDAC0CH0>;
      };
      group1 {
        silabs,analog-bus = <ABUS_CDEVEN1_VDAC0CH1>;
      };
  };

  &vdac0 {
    pinctrl-0 = <&vdac0_default>;
    pinctrl-names = "default";
    status = "okay";
    voltage-reference = "1.25V";
    channel@0 {
      reg = <0>;
      aux-output = <VDAC_OUTPUT_PC1>;
    };
    channel@1 {
      reg = <1>;
      aux-output = <VDAC_OUTPUT_PC2>;
    };
  };

In the above example, note that the device specific bindings for pinctrl
were included. This header defines the set of analog bus allocations possible
for xg24 parts, and similar headers exist for other parts.

Properties

Top level properties

These property descriptions apply to “silabs,vdac” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

Name

Type

Details

voltage-reference

string

Reference voltage to use.
The default corresponds to the reset value of the register field.

Default value: 1.25V

Legal values: '1.25V', '2.5V', 'AVDD', 'VREFP'

warmup-cycles

int

Number of prescaled CLK_VDAC + 1 for the DAC to warmup.
This determines how many clock cycles are needed for the DAC to stabilize
before it can be used for conversions.
The default corresponds to the reset value of the register field.

refresh-period-cycles

int

Channel refresh period configuration.
Determines how often the DAC channels are refreshed to maintain accuracy.
The default corresponds to the reset value of the register field.

Default value: 2

Legal values: 2, 4, 8, 16, 32, 64, 128, 256

#io-channel-cells

int

This property is required.

Constant value: 1

pinctrl-0

phandles

Pin configuration/s for the first state. Content is specific to the
selected pin controller driver implementation.

pinctrl-1

phandles

Pin configuration/s for the second state. See pinctrl-0.

pinctrl-2

phandles

Pin configuration/s for the third state. See pinctrl-0.

pinctrl-3

phandles

Pin configuration/s for the fourth state. See pinctrl-0.

pinctrl-4

phandles

Pin configuration/s for the fifth state. See pinctrl-0.

pinctrl-names

string-array

Names for the provided states. The number of names needs to match the
number of states.

Child node properties

Name

Type

Details

reg

int

Channel identifier.

This property is required.

Legal values: 0, 1

See Important properties for more information.

main-output

boolean

Connects the channel to the dedicated output pin.

aux-output

int

Connects the low-power channel to the auxiliary outputs.
Connects the channel to the specified output pin on the analog bus.

short-output

boolean

Short-circuits the main and auxiliary outputs.
Set to use high-power mode with auxiliary outputs.

low-power-mode

boolean

Sets the power mode of the main output to low instead of high.

high-capacitance-load

boolean

Enables high-capacitance load mode for the DAC channel.
Only usable without low-power-mode.

sample-off-mode

boolean

Enables sample-off mode for the DAC channel.
If enabled, the output is only driven for a limited time per conversion.

output-hold-cycles

int

Time in DAC clock cycles that the output is held for the DAC channel.
Only usable with sample-off-mode.
The default corresponds to the reset value of the register field.

refresh-timer

boolean

Enables the refresh timer.

Specifier cell names

  • io-channel cells: output