st,stm32n6-rcc

Vendor: STMicroelectronics

Description

STM32N6 RCC (Reset and Clock controller).

This node is in charge of system clock ('SYSCLK') source selection and
System Clock Generation.

Configuring STM32 Reset and Clock controller node:

System clock source should be selected amongst the clock nodes available in "clocks"
node (typically 'clk_hse, clk_csi', 'pll', ...).
As part of this node configuration, SYSCLK frequency should also be defined, using
"clock-frequency" property.
Last, bus clocks (typically HCLK, PCLK1, PCLK2) should be configured using matching
prescaler properties.
Here is an example of correctly configured rcc node:
&rcc {
  clocks = <&ic2>;
  clock-frequency = <DT_FREQ_M(400)>;
  ahb-prescaler = <2>;
  apb1-prescaler = <1>;
  apb2-prescaler = <1>;
  apb4-prescaler = <1>;
  apb5-prescaler = <1>;
}

Confere st,stm32-rcc binding for information about domain clocks configuration.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

#clock-cells

int

Number of items to expect in a Clock specifier

This property is required.

Constant value: 2

clock-frequency

int

default frequency in Hz for clock output

This property is required.

ahb-prescaler

int

AHB clock prescaler

This property is required.

Legal values: 1, 2, 4, 8, 16, 32, 64, 128

apb1-prescaler

int

CPU domain APB1 prescaler

This property is required.

Legal values: 1, 2, 4, 8, 16, 32, 64, 128

apb2-prescaler

int

CPU domain APB2 prescaler

This property is required.

Legal values: 1, 2, 4, 8, 16, 32, 64, 128

apb4-prescaler

int

CPU domain APB4 prescaler

This property is required.

Legal values: 1, 2, 4, 8, 16, 32, 64, 128

apb5-prescaler

int

CPU domain APB5 prescaler

This property is required.

Legal values: 1, 2, 4, 8, 16, 32, 64, 128

timg-prescaler

int

TIMG timer group domain prescaler divider, default reset value is 'not divided'.

Default value: 1

Legal values: 1, 2, 4, 8

Specifier cell names

  • clock cells: bus, bits