infineon,cat1-peri-div

Vendor: Infineon Technologies

Note

An implementation of a driver matching this compatible is available in drivers/clock_control/clock_control_ifx_cat1_peri_clock.c.

Description

infineon cat1 peripheral divider 8bit.

Properties

Properties not inherited from the base binding file.

Name

Type

Details

clk-dst

uint8-array

 
Clock Connections. PDL uses the target IP to identify the peri group

div-type

int

 
Clock divider type.

div-num

int

 
Programmable clock divider types: DIV_8_BIT, DIV_16_BIT, DIV_16_5_BIT, DIV_24_5_BIT

div-value

int

 
For non-fractional clock dividers (div-type: DIV_8_BIT, DIV_16_BIT)
Causes integer division of (divider value + 1), or division by 1 to 256
(8-bit divider) or 1 to 65536 (16-bit divider).

For fractional clock dividers (div-type: DIV_16_5_BIT, DIV_24_5_BIT):
The integer divider value. The source of the divider is peri_clk, which is a
divided version of hf_clk[0]. The divider value causes integer division of
(divider value + 1), or division by 1 to 65536 (16-bit divider) or 1 to 16777216
(24-bit divider).

div-frac-value

int

 
The fraction part of the divider. The fractional divider can be 0-31, thus
it divides the clock by 1/32 for each count. To divide the clock by 11/32nds
set this value to 11.

scb-block

int

 
SCB device instance peripheral clock is assigned to:
&scb0 : scb-block = <0>
&scb3 : scb-block = <3>
&scb5 : scb-block = <5>

This property is required.

#clock-cells

int

 
Number of items to expect in a Clock specifier

This property is required.