ti,tcan4x5x (on spi bus)

Vendor: Texas Instruments

Note

An implementation of a driver matching this compatible is available in drivers/can/can_tcan4x5x.c.

Description

Texas Instruments TCAN4x5x SPI CAN FD controller.

Example:
  &spi0 {
    tcan4x5x: can@0 {
      compatible = ti,tcan4x5x";
      reg = <0>;
      spi-max-frequency = <18000000>;
      clock-frequency = <40000000>;
      device-state-gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
      device-wake-gpios = <&gpio0 1 GPIO_ACTIVE_HIGH>;
      reset-gpios = <&gpio0 2 GPIO_ACTIVE_HIGH>;
      int-gpios = <&gpio0 3 GPIO_ACTIVE_LOW>;
      bosch,mram-cfg = <0x0 15 15 5 5 0 10 10>;
      status = "okay";

      can-transceiver {
        max-bitrate = <8000000>;
      };
    };
  };

Properties

Top level properties

These property descriptions apply to “ti,tcan4x5x” nodes themselves. This page also describes child node properties in the following sections.

Properties not inherited from the base binding file.

Name

Type

Details

clock-frequency

int

TCAN4x5x oscillator clock frequency in Hz (20MHz or 40MHz).

This property is required.

Legal values: 20000000, 40000000

device-state-gpios

phandle-array

GPIO connected to the TCAN4x5x nWKRQ output. This signal is active low.

device-wake-gpios

phandle-array

GPIO connected to the TCAN4x5x WAKE input. This signal is high-voltage, active high.

reset-gpios

phandle-array

GPIO connected to the TCAN4x5x RST input. This signal is active high.

int-gpios

phandle-array

GPIO connected to the TCAN4x5x nINT interrupt output. This signal is open-drain, active low.

This property is required.

bosch,mram-cfg

array

Bosch M_CAN message RAM configuration. The cells in the array have the following format:

<offset std-filter-elements ext-filter-elements rx-fifo0-elements rx-fifo1-elements
rx-buffer-elements tx-event-fifo-elements tx-buffer-elements>

The 'offset' is an address offset of the message RAM where the following elements start
from. This is normally set to 0x0 when using a non-shared message RAM. The remaining cells
specify how many elements are allocated for each filter type/FIFO/buffer.

The Bosch M_CAN IP supports the following elements:
11-bit Filter    0-128 elements / 0-128 words
29-bit Filter     0-64 elements / 0-128 words
Rx FIFO 0                   0-64 elements / 0-1152 words
Rx FIFO 1                   0-64 elements / 0-1152 words
Rx Buffers          0-64 elements / 0-1152 words
Tx Event FIFO     0-32 elements / 0-64 words
Tx Buffers          0-32 elements / 0-576 words

This property is required.

bitrate-data

int

Initial data phase bitrate in bit/s.  If this is unset, the initial data phase bitrate is set
to CONFIG_CAN_DEFAULT_BITRATE_DATA.

sample-point-data

int

Initial data phase sample point in per mille (e.g. 875 equals 87.5%).

If this is unset (or if it is set to 0), the initial sample point will default to 75.0% for
bitrates over 800 kbit/s, 80.0% for bitrates over 500 kbit/s, and 87.5% for all other
bitrates.

bitrate

int

Initial bitrate in bit/s. If this is unset, the initial bitrate is set to
CONFIG_CAN_DEFAULT_BITRATE.

sample-point

int

Initial sample point in per mille (e.g. 875 equals 87.5%).

If this is unset (or if it is set to 0), the initial sample point will default to 75.0% for
bitrates over 800 kbit/s, 80.0% for bitrates over 500 kbit/s, and 87.5% for all other
bitrates.

phys

phandle

Actively controlled CAN transceiver.

Example:
  transceiver0: can-phy0 {
    compatible = "nxp,tja1040", "can-transceiver-gpio";
    standby-gpios = <gpioa 0 GPIO_ACTIVE_HIGH>;
    max-bitrate = <1000000>;
    #phy-cells = <0>;
  };

  &can0 {
    status = "okay";

    phys = <&transceiver0>;
  };

spi-max-frequency

int

Maximum clock frequency of device's SPI interface in Hz

This property is required.

duplex

int

Duplex mode, full or half. By default it's always full duplex thus 0
as this is, by far, the most common mode.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0    SPI_FULL_DUPLEX
  2048 SPI_HALF_DUPLEX

Legal values: 0, 2048

frame-format

int

Motorola or TI frame format. By default it's always Motorola's,
thus 0 as this is, by far, the most common format.
Use the macros not the actual enum value, here is the concordance
list (see dt-bindings/spi/spi.h)
  0     SPI_FRAME_FORMAT_MOTOROLA
  32768 SPI_FRAME_FORMAT_TI

Legal values: 0, 32768

spi-cpol

boolean

SPI clock polarity which indicates the clock idle state.
If it is used, the clock idle state is logic high; otherwise, low.

spi-cpha

boolean

SPI clock phase that indicates on which edge data is sampled.
If it is used, data is sampled on the second edge; otherwise, on the first edge.

spi-hold-cs

boolean

In some cases, it is necessary for the master to manage SPI chip select
under software control, so that multiple spi transactions can be performed
without releasing it. A typical use case is variable length SPI packets
where the first spi transaction reads the length and the second spi transaction
reads length bytes.

supply-gpios

phandle-array

GPIO specifier that controls power to the device.

This property should be provided when the device has a dedicated
switch that controls power to the device.  The supply state is
entirely the responsibility of the device driver.

Contrast with vin-supply.

vin-supply

phandle

Reference to the regulator that controls power to the device.
The referenced devicetree node must have a regulator compatible.

This property should be provided when device power is supplied
by a shared regulator.  The supply state is dependent on the
request status of all devices fed by the regulator.

Contrast with supply-gpios.  If both properties are provided
then the regulator must be requested before the supply GPIOS is
set to an active state, and the supply GPIOS must be set to an
inactive state before releasing the regulator.

Child node properties

Name

Type

Details

min-bitrate

int

The minimum bitrate supported by the CAN transceiver in bits/s.

max-bitrate

int

The maximum bitrate supported by the CAN transceiver in bits/s.

This property is required.