SF32LB52-DevKit-LCD
Overview
SF32LB52-DevKit-LCD is a development board based on the SF32LB52x series chip SoC. It is mainly used for developing various applications based on SPI/DSPI/QSPI or MCU/8080 interface display screens.
More information about the board can be found at the SF32LB52-DevKit-LCD website [1].
Hardware
SF32LB52-DevKit-LCD provides the following hardware components:
SF32LB52x-MOD-N16R8 module based on SF32LB525UC6
8MB OPI-PSRAM @ 144MHz (from SF32LB525UC6)
128Mb QSPI-NOR @ 72MHz, STR mode
48MHz crystal
32.768KHz crystal
Onboard antenna (default) or IPEX antenna, selectable via 0 ohm resistor
RF matching network and other R/L/C components
Dedicated screen interface
SPI/DSPI/QSPI, supports DDR mode QSPI, led out through 22-pin FPC and 40-pin header
8-bit MCU/8080, led out through 22pin FPC and 40pin header.
Supports touch screens with I2C interface.
Audio
Analog MIC input.
Analog audio output, onboard Class-D audio PA.
USB
Type C interface, connected to USB to serial chip, enabling program download and software debug, can also supply power.
Type C interface, supports USB-2.0 FS, can also supply power.
SD card
Supports TF cards using SPI interface, onboard Micro SD card slot.
Supported Features
The sf32lb52_devkit_lcd
board supports the hardware features listed below.
- on-chip / on-board
- Feature integrated in the SoC / present on the board.
- 2 / 2
-
Number of instances that are enabled / disabled.
Click on the label to see the first instance of this feature in the board/SoC DTS files. -
vnd,foo
-
Compatible string for the Devicetree binding matching the feature.
Click on the link to view the binding documentation.
sf32lb52_devkit_lcd/sf32lb525uc6
target
Type |
Location |
Description |
Compatible |
---|---|---|---|
CPU |
on-chip |
ARM Cortex-M33 CPU1 |
|
Clock control |
on-chip |
SiFli Reset and Clock Controller (RCC) is a multi-function peripheral in charge of reset control and clock control for all SoC peripherals1 |
|
on-chip |
SiFli DLL is a digital phase-locked loop peripheral, controlled by the RCC1 |
||
on-chip |
|||
on-chip |
SiFli SF32LB HXT48 clock1 |
||
Interrupt controller |
on-chip |
ARMv8-M NVIC (Nested Vectored Interrupt Controller)1 |
|
Memory controller |
on-chip |
||
Multi-Function Device |
on-chip |
SiFli SF32LB RCC (Reset and Clock Control) if a multi-function peripheral in charge of reset and clock control for all SoC peripherals1 |
|
MMU / MPU |
on-chip |
ARMv8-M MPU (Memory Protection Unit)1 |
|
MTD |
on-board |
Fixed partitions of a flash (or other non-volatile storage) memory1 |
|
Pin control |
on-chip |
SF32LB52x Pin multiplexer and pin configuration controller (HPSYS_PINMUX)1 |
|
Power management |
on-chip |
SiFli SF32LB AON1 |
|
on-chip |
SiFli SF32LB PMUC1 |
||
Serial controller |
on-chip |
SiFli SF32LB USART1 |
|
SRAM |
on-chip |
Generic on-chip SRAM1 |
|
System controller |
on-chip |
SiFli System Configuration (HPSYS_CFG)1 |
|
Timer |
on-chip |
ARMv8-M System Tick1 |
Programming and Debugging
The sf32lb52_devkit_lcd
board supports the runners and associated west commands listed below.
flash | debug | |
---|---|---|
sftool | ✅ (default) |
Refer to sftool website [2] for more information.