Zephyr API Documentation 4.0.0-rc3
A Scalable Open Source RTOS
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test_asm_inline_gcc.h
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1/* GCC specific test inline assembler functions and macros */
2
3/*
4 * Copyright (c) 2015, Wind River Systems, Inc.
5 *
6 * SPDX-License-Identifier: Apache-2.0
7 */
8
9#ifndef _TEST_ASM_INLINE_GCC_H
10#define _TEST_ASM_INLINE_GCC_H
11
12#include <zephyr/sys/barrier.h>
13
14#if !defined(__GNUC__)
15#error test_asm_inline_gcc.h goes only with GCC
16#endif
17
18#if defined(CONFIG_X86)
19static inline void timestamp_serialize(void)
20{
21 __asm__ __volatile__ (/* serialize */
22 "xorl %%eax,%%eax;\n\t"
23 "cpuid;\n\t"
24 :
25 :
26 : "%eax", "%ebx", "%ecx", "%edx");
27}
28#elif defined(CONFIG_CPU_CORTEX_M) || \
29 defined(CONFIG_CPU_AARCH32_CORTEX_R) || \
30 defined(CONFIG_CPU_AARCH32_CORTEX_A) || \
31 defined(CONFIG_CPU_CORTEX_A) || \
32 defined(CONFIG_CPU_AARCH64_CORTEX_R)
33static inline void timestamp_serialize(void)
34{
36}
37#elif defined(CONFIG_ARC)
38#define timestamp_serialize()
39#elif defined(CONFIG_ARCH_POSIX)
40#define timestamp_serialize()
41#elif defined(CONFIG_XTENSA)
42#define timestamp_serialize()
43#elif defined(CONFIG_NIOS2)
44#define timestamp_serialize()
45#elif defined(CONFIG_RISCV)
46#define timestamp_serialize()
47#elif defined(CONFIG_SPARC)
48#define timestamp_serialize()
49#elif defined(CONFIG_MIPS)
50#define timestamp_serialize()
51#else
52#error implementation of timestamp_serialize() not provided for your CPU target
53#endif
54
55#endif /* _TEST_ASM_INLINE_GCC_H */
static ALWAYS_INLINE void barrier_isync_fence_full(void)
Full/sequentially-consistent instruction synchronization barrier.
Definition barrier.h:78