Zephyr API Documentation
4.0.99
A Scalable Open Source RTOS
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stm32_adc.h
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/*
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* Copyright (c) 2023 STMicrelectronics
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_
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#include <
zephyr/dt-bindings/adc/adc.h
>
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#define STM32_ADC_REG_MASK BIT_MASK(8)
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#define STM32_ADC_REG_SHIFT 0U
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#define STM32_ADC_SHIFT_MASK BIT_MASK(5)
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#define STM32_ADC_SHIFT_SHIFT 8U
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#define STM32_ADC_MASK_MASK BIT_MASK(3)
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#define STM32_ADC_MASK_SHIFT 13U
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#define STM32_ADC_REG_VAL_MASK BIT_MASK(3)
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#define STM32_ADC_REG_VAL_SHIFT 16U
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#define STM32_ADC_REAL_VAL_MASK BIT_MASK(13)
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#define STM32_ADC_REAL_VAL_SHIFT 19U
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#define STM32_ADC(real_val, reg_val, mask, shift, reg) \
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((((reg) & STM32_ADC_REG_MASK) << STM32_ADC_REG_SHIFT) | \
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(((shift) & STM32_ADC_SHIFT_MASK) << STM32_ADC_SHIFT_SHIFT) | \
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(((mask) & STM32_ADC_MASK_MASK) << STM32_ADC_MASK_SHIFT) | \
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(((reg_val) & STM32_ADC_REG_VAL_MASK) << STM32_ADC_REG_VAL_SHIFT) | \
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(((real_val) & STM32_ADC_REAL_VAL_MASK) << STM32_ADC_REAL_VAL_SHIFT))
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#define STM32_ADC_GET_REAL_VAL(val) \
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(((val) >> STM32_ADC_REAL_VAL_SHIFT) & STM32_ADC_REAL_VAL_MASK)
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#define STM32_ADC_GET_REG_VAL(val) \
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(((val) >> STM32_ADC_REG_VAL_SHIFT) & STM32_ADC_REG_VAL_MASK)
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#define STM32_ADC_GET_MASK(val) \
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(((val) >> STM32_ADC_MASK_SHIFT) & STM32_ADC_MASK_MASK)
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#define STM32_ADC_GET_SHIFT(val) \
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(((val) >> STM32_ADC_SHIFT_SHIFT) & STM32_ADC_SHIFT_MASK)
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#define STM32_ADC_GET_REG(val) \
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(((val) >> STM32_ADC_REG_SHIFT) & STM32_ADC_REG_MASK)
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/*
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* Macro used to store resolution info. STM32_ADC_RES_* macros are defined in
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* respective stm32xx_adc.h files
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*/
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#define STM32_ADC_RES(resolution, reg_val) \
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STM32_ADC(resolution, reg_val, STM32_ADC_RES_MASK, STM32_ADC_RES_SHIFT, \
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STM32_ADC_RES_REG)
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#define SYNC 1
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#define ASYNC 2
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#define NOT_FULLY_CONFIGURABLE 0
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#define FULLY_CONFIGURABLE 1
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#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_ */
adc.h
zephyr
dt-bindings
adc
stm32_adc.h
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