Zephyr API Documentation 4.0.0-rc2
A Scalable Open Source RTOS
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stm32_adc.h
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1/*
2 * Copyright (c) 2023 STMicrelectronics
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_
7#define ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_
8
10
11#define STM32_ADC_REG_MASK BIT_MASK(8)
12#define STM32_ADC_REG_SHIFT 0U
13#define STM32_ADC_SHIFT_MASK BIT_MASK(5)
14#define STM32_ADC_SHIFT_SHIFT 8U
15#define STM32_ADC_MASK_MASK BIT_MASK(3)
16#define STM32_ADC_MASK_SHIFT 13U
17#define STM32_ADC_REG_VAL_MASK BIT_MASK(3)
18#define STM32_ADC_REG_VAL_SHIFT 16U
19#define STM32_ADC_REAL_VAL_MASK BIT_MASK(13)
20#define STM32_ADC_REAL_VAL_SHIFT 19U
21
37#define STM32_ADC(real_val, reg_val, mask, shift, reg) \
38 ((((reg) & STM32_ADC_REG_MASK) << STM32_ADC_REG_SHIFT) | \
39 (((shift) & STM32_ADC_SHIFT_MASK) << STM32_ADC_SHIFT_SHIFT) | \
40 (((mask) & STM32_ADC_MASK_MASK) << STM32_ADC_MASK_SHIFT) | \
41 (((reg_val) & STM32_ADC_REG_VAL_MASK) << STM32_ADC_REG_VAL_SHIFT) | \
42 (((real_val) & STM32_ADC_REAL_VAL_MASK) << STM32_ADC_REAL_VAL_SHIFT))
43
44#define STM32_ADC_GET_REAL_VAL(val) \
45 (((val) >> STM32_ADC_REAL_VAL_SHIFT) & STM32_ADC_REAL_VAL_MASK)
46
47#define STM32_ADC_GET_REG_VAL(val) \
48 (((val) >> STM32_ADC_REG_VAL_SHIFT) & STM32_ADC_REG_VAL_MASK)
49
50#define STM32_ADC_GET_MASK(val) \
51 (((val) >> STM32_ADC_MASK_SHIFT) & STM32_ADC_MASK_MASK)
52
53#define STM32_ADC_GET_SHIFT(val) \
54 (((val) >> STM32_ADC_SHIFT_SHIFT) & STM32_ADC_SHIFT_MASK)
55
56#define STM32_ADC_GET_REG(val) \
57 (((val) >> STM32_ADC_REG_SHIFT) & STM32_ADC_REG_MASK)
58
59/*
60 * Macro used to store resolution info. STM32_ADC_RES_* macros are defined in
61 * respective stm32xx_adc.h files
62 */
63#define STM32_ADC_RES(resolution, reg_val) \
64 STM32_ADC(resolution, reg_val, STM32_ADC_RES_MASK, STM32_ADC_RES_SHIFT, \
65 STM32_ADC_RES_REG)
66
73#define SYNC 1
74#define ASYNC 2
83#define NOT_FULLY_CONFIGURABLE 0
84#define FULLY_CONFIGURABLE 1
87#endif /* ZEPHYR_INCLUDE_DT_BINDINGS_STM32_ADC_H_ */