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4.2.0-rc3
A Scalable Open Source RTOS
4.2.0-rc3
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rtc_ds3231.h
Go to the documentation of this file.
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/*
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* SPDX-License-Identifier: Apache-2.0
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*
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* Copyright (c) 2024 Gergo Vari <work@gergovari.com>
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*/
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/*
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* REGISTERS
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*/
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/* Time registers */
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#define DS3231_REG_TIME_SECONDS 0x00
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#define DS3231_REG_TIME_MINUTES 0x01
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#define DS3231_REG_TIME_HOURS 0x02
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#define DS3231_REG_TIME_DAY_OF_WEEK 0x03
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#define DS3231_REG_TIME_DATE 0x04
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#define DS3231_REG_TIME_MONTH 0x05
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#define DS3231_REG_TIME_YEAR 0x06
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/* Alarm 1 registers */
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#define DS3231_REG_ALARM_1_SECONDS 0x07
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#define DS3231_REG_ALARM_1_MINUTES 0x08
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#define DS3231_REG_ALARM_1_HOURS 0x09
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#define DS3231_REG_ALARM_1_DATE 0x0A
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/* Alarm 2 registers */
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/* Alarm 2 has no seconds to set, it only has minute accuracy. */
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#define DS3231_REG_ALARM_2_MINUTES 0x0B
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#define DS3231_REG_ALARM_2_HOURS 0x0C
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#define DS3231_REG_ALARM_2_DATE 0x0D
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/* Control registers */
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#define DS3231_REG_CTRL 0x0E
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#define DS3231_REG_CTRL_STS 0x0F
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/* Aging offset register */
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#define DS3231_REG_AGING_OFFSET 0x10
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/*
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* BITMASKS
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*/
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/* Time bitmasks */
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#define DS3231_BITS_TIME_SECONDS GENMASK(6, 0)
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#define DS3231_BITS_TIME_MINUTES GENMASK(6, 0)
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#define DS3231_BITS_TIME_HOURS GENMASK(5, 0)
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#define DS3231_BITS_TIME_PM BIT(5)
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#define DS3231_BITS_TIME_12HR BIT(6)
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#define DS3231_BITS_TIME_DAY_OF_WEEK GENMASK(2, 0)
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#define DS3231_BITS_TIME_DATE GENMASK(5, 0)
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#define DS3231_BITS_TIME_MONTH GENMASK(4, 0)
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#define DS3231_BITS_TIME_CENTURY BIT(7)
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#define DS3231_BITS_TIME_YEAR GENMASK(7, 0)
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/* Alarm bitmasks */
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/* All alarm bitmasks match with time other than date and the alarm rate bit. */
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#define DS3231_BITS_ALARM_RATE BIT(7)
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#define DS3231_BITS_ALARM_DATE_W_OR_M BIT(6)
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#define DS3231_BITS_SIGN BIT(7)
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/* Control bitmasks */
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#define DS3231_BITS_CTRL_EOSC BIT(7)
/* enable oscillator, active low */
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#define DS3231_BITS_CTRL_BBSQW BIT(6)
/* enable battery-backed square-wave */
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/* Setting the CONV bit to 1 forces the temperature sensor to
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* convert the temperature into digital code and
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* execute the TCXO algorithm to update
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* the capacitance array to the oscillator. This can only
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* happen when a conversion is not already in progress.
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* The user should check the status bit BSY before
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* forcing the controller to start a new TCXO execution.
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* A user-initiated temperature conversion
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* does not affect the internal 64-second update cycle.
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*/
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#define DS3231_BITS_CTRL_CONV BIT(6)
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/* Rate selectors */
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/* RS2 | RS1 | SQW FREQ
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* 0 | 0 | 1Hz
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* 0 | 1 | 1.024kHz
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* 1 | 0 | 4.096kHz
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* 1 | 1 | 8.192kHz
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*/
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#define DS3231_BITS_CTRL_RS2 BIT(4)
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#define DS3231_BITS_CTRL_RS1 BIT(3)
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#define DS3231_BITS_CTRL_INTCTRL BIT(2)
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#define DS3231_BITS_CTRL_ALARM_2_EN BIT(1)
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#define DS3231_BITS_CTRL_ALARM_1_EN BIT(0)
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/* Control status bitmasks */
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/* For some reason you can access OSF in both control and control status registers. */
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#define DS3231_BITS_CTRL_STS_OSF BIT(7)
/* oscillator stop flag */
/* read only */
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#define DS3231_BITS_CTRL_STS_32_EN BIT(3)
/* 32kHz square-wave */
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/* set when TXCO is busy, see CONV flag: read only */
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#define DS3231_BITS_CTRL_STS_BSY BIT(2)
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#define DS3231_BITS_CTRL_STS_ALARM_2_FLAG BIT(1)
/* can only be set to 0 */
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#define DS3231_BITS_CTRL_STS_ALARM_1_FLAG BIT(0)
/* can only be set to 0 */
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/* Aging offset bitmask */
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#define DS3231_BITS_DATA BIT(6, 0)
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/* Settings bitmasks */
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#define DS3231_BITS_STS_OSC BIT(0)
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#define DS3231_BITS_STS_INTCTRL BIT(1)
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#define DS3231_BITS_STS_SQW BIT(2)
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#define DS3231_BITS_STS_32KHZ BIT(3)
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#define DS3231_BITS_STS_ALARM_1 BIT(4)
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#define DS3231_BITS_STS_ALARM_2 BIT(5)
zephyr
drivers
rtc
rtc_ds3231.h
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