13#ifndef ZEPHYR_INCLUDE_DRIVERS_PHY_H_
14#define ZEPHYR_INCLUDE_DRIVERS_PHY_H_
58#define PHY_LINK_IS_FULL_DUPLEX(x) (x & (BIT(1) | BIT(3) | BIT(5) | BIT(6) | BIT(7)))
67#define PHY_LINK_IS_SPEED_1000M(x) (x & (BIT(4) | BIT(5)))
76#define PHY_LINK_IS_SPEED_100M(x) (x & (BIT(2) | BIT(3)))
161__subsystem
struct ethphy_driver_api {
190 int (*get_plca_sts)(
const struct device *dev,
bool *plca_sts);
210 const struct ethphy_driver_api *api = (
const struct ethphy_driver_api *)dev->
api;
212 return api->cfg_link(dev, speeds);
230 const struct ethphy_driver_api *api = (
const struct ethphy_driver_api *)dev->
api;
232 return api->get_link(dev,
state);
252 const struct ethphy_driver_api *api = (
const struct ethphy_driver_api *)dev->
api;
254 return api->link_cb_set(dev, callback, user_data);
271 const struct ethphy_driver_api *api = (
const struct ethphy_driver_api *)dev->
api;
273 return api->read(dev, reg_addr, value);
290 const struct ethphy_driver_api *api = (
const struct ethphy_driver_api *)dev->
api;
292 return api->write(dev, reg_addr, value);
311 const struct ethphy_driver_api *api = (
const struct ethphy_driver_api *)dev->
api;
313 return api->read_c45(dev, devad, regad, data);
332 const struct ethphy_driver_api *api = (
const struct ethphy_driver_api *)dev->
api;
334 return api->write_c45(dev, devad, regad, data);
350 const struct ethphy_driver_api *api = (
const struct ethphy_driver_api *)dev->
api;
352 return api->set_plca_cfg(dev, plca_cfg);
368 const struct ethphy_driver_api *api = (
const struct ethphy_driver_api *)dev->
api;
370 return api->get_plca_cfg(dev, plca_cfg);
386 const struct ethphy_driver_api *api = (
const struct ethphy_driver_api *)dev->
api;
388 return api->get_plca_sts(dev, plca_status);
static int phy_link_callback_set(const struct device *dev, phy_callback_t callback, void *user_data)
Set link state change callback.
Definition phy.h:249
int genphy_get_plca_cfg(const struct device *dev, struct phy_plca_cfg *plca_cfg)
Write PHY PLCA configuration.
static int phy_set_plca_cfg(const struct device *dev, struct phy_plca_cfg *plca_cfg)
Write PHY PLCA configuration.
Definition phy.h:348
void(* phy_callback_t)(const struct device *dev, struct phy_link_state *state, void *user_data)
Define the callback function signature for phy_link_callback_set() function.
Definition phy.h:152
static int phy_read(const struct device *dev, uint16_t reg_addr, uint32_t *value)
Read PHY registers.
Definition phy.h:269
static int phy_write_c45(const struct device *dev, uint8_t devad, uint16_t regad, uint16_t data)
Write PHY C45 register.
Definition phy.h:329
static int phy_get_link_state(const struct device *dev, struct phy_link_state *state)
Get PHY link state.
Definition phy.h:228
static int phy_read_c45(const struct device *dev, uint8_t devad, uint16_t regad, uint16_t *data)
Read PHY C45 register.
Definition phy.h:308
static int phy_write(const struct device *dev, uint16_t reg_addr, uint32_t value)
Write PHY register.
Definition phy.h:288
static int phy_get_plca_sts(const struct device *dev, bool *plca_status)
Read PHY PLCA status.
Definition phy.h:384
int genphy_set_plca_cfg(const struct device *dev, struct phy_plca_cfg *plca_cfg)
Read PHY PLCA configuration.
static int phy_get_plca_cfg(const struct device *dev, struct phy_plca_cfg *plca_cfg)
Read PHY PLCA configuration.
Definition phy.h:366
phy_link_speed
Ethernet link speeds.
Definition phy.h:32
static int phy_configure_link(const struct device *dev, enum phy_link_speed speeds)
Configure PHY link.
Definition phy.h:208
int genphy_get_plca_sts(const struct device *dev, bool *plca_status)
Read PHY PLCA status.
@ LINK_HALF_100BASE_T
100Base-T Half-Duplex
Definition phy.h:38
@ LINK_FULL_2500BASE_T
2.5GBase-T Full-Duplex
Definition phy.h:46
@ LINK_HALF_10BASE_T
10Base-T Half-Duplex
Definition phy.h:34
@ LINK_FULL_5000BASE_T
5GBase-T Full-Duplex
Definition phy.h:48
@ LINK_FULL_1000BASE_T
1000Base-T Full-Duplex
Definition phy.h:44
@ LINK_FULL_10BASE_T
10Base-T Full-Duplex
Definition phy.h:36
@ LINK_FULL_100BASE_T
100Base-T Full-Duplex
Definition phy.h:40
@ LINK_HALF_1000BASE_T
1000Base-T Half-Duplex
Definition phy.h:42
#define BIT(n)
Unsigned integer with bit position n set (signed in assembly language).
Definition util_macro.h:44
state
Definition parser_state.h:29
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
__UINT16_TYPE__ uint16_t
Definition stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition device.h:411
const void * api
Address of the API structure exposed by the device instance.
Definition device.h:417
Link state.
Definition phy.h:79
bool is_up
When true the link is active and connected.
Definition phy.h:83
enum phy_link_speed speed
Link speed.
Definition phy.h:81
PLCA (Physical Layer Collision Avoidance) Reconciliation Sublayer configurations.
Definition phy.h:87
uint8_t to_timer
PLCA to_timer in bit-times, which determines the PLCA transmit opportunity.
Definition phy.h:101
uint8_t node_count
PLCA node count.
Definition phy.h:95
uint8_t version
PLCA register map version.
Definition phy.h:89
bool enable
PLCA configured mode (enable/disable)
Definition phy.h:91
uint8_t node_id
PLCA local node identifier.
Definition phy.h:93
uint8_t burst_count
Additional frames a node is allowed to send in single transmit opportunity (TO)
Definition phy.h:97
uint8_t burst_timer
Wait time for the MAC to send a new frame before interrupting the burst.
Definition phy.h:99