Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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phy.h
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1
6
7/*
8 * Copyright (c) 2021 IP-Logix Inc.
9 * Copyright 2022 NXP
10 * Copyright (c) 2025 Aerlync Labs Inc.
11 *
12 * SPDX-License-Identifier: Apache-2.0
13 */
14#ifndef ZEPHYR_INCLUDE_DRIVERS_PHY_H_
15#define ZEPHYR_INCLUDE_DRIVERS_PHY_H_
16
25#include <zephyr/types.h>
26#include <zephyr/device.h>
28#include <errno.h>
29
30#ifdef __cplusplus
31extern "C" {
32#endif
33
53
61#define PHY_LINK_IS_FULL_DUPLEX(x) \
62 (x & (LINK_FULL_10BASE | LINK_FULL_100BASE | LINK_FULL_1000BASE | LINK_FULL_2500BASE | \
63 LINK_FULL_5000BASE))
64
72#define PHY_LINK_IS_SPEED_1000M(x) (x & (LINK_HALF_1000BASE | LINK_FULL_1000BASE))
73
81#define PHY_LINK_IS_SPEED_100M(x) (x & (LINK_HALF_100BASE | LINK_FULL_100BASE))
82
90#define PHY_LINK_IS_SPEED_10M(x) (x & (LINK_HALF_10BASE | LINK_FULL_10BASE))
91
99
105
123
133typedef void (*phy_callback_t)(const struct device *dev, struct phy_link_state *state,
134 void *user_data);
135
142__subsystem struct ethphy_driver_api {
144 int (*get_link)(const struct device *dev, struct phy_link_state *state);
145
147 int (*cfg_link)(const struct device *dev, enum phy_link_speed adv_speeds,
149
153 int (*link_cb_set)(const struct device *dev, phy_callback_t cb, void *user_data);
154
156 int (*read)(const struct device *dev, uint16_t reg_addr, uint32_t *data);
157
159 int (*write)(const struct device *dev, uint16_t reg_addr, uint32_t data);
160
162 int (*read_c45)(const struct device *dev, uint8_t devad, uint16_t regad, uint16_t *data);
163
165 int (*write_c45)(const struct device *dev, uint8_t devad, uint16_t regad, uint16_t data);
166
167#if defined(CONFIG_ETH_PHY_API_PLCA) || defined(__DOXYGEN__)
168 /* Set PLCA settings */
169 int (*set_plca_cfg)(const struct device *dev, struct phy_plca_cfg *plca_cfg);
170
171 /* Get PLCA settings */
172 int (*get_plca_cfg)(const struct device *dev, struct phy_plca_cfg *plca_cfg);
173
174 /* Get PLCA status */
175 int (*get_plca_sts)(const struct device *dev, bool *plca_sts);
176#endif /* CONFIG_ETH_PHY_API_PLCA */
177};
181
196static inline int phy_configure_link(const struct device *dev, enum phy_link_speed speeds,
198{
199 if (DEVICE_API_GET(ethphy, dev)->cfg_link == NULL) {
200 return -ENOSYS;
201 }
202
203 /* Check if only one speed is set, when auto-negotiation is disabled */
205 return -EINVAL;
206 }
207
208 return DEVICE_API_GET(ethphy, dev)->cfg_link(dev, speeds, flags);
209}
210
224static inline int phy_get_link_state(const struct device *dev, struct phy_link_state *state)
225{
226 if (DEVICE_API_GET(ethphy, dev)->get_link == NULL) {
227 return -ENOSYS;
228 }
229
230 return DEVICE_API_GET(ethphy, dev)->get_link(dev, state);
231}
232
251static inline int phy_link_callback_set(const struct device *dev, phy_callback_t callback,
252 void *user_data)
253{
254 if (DEVICE_API_GET(ethphy, dev)->link_cb_set == NULL) {
255 return -ENOSYS;
256 }
257
258 return DEVICE_API_GET(ethphy, dev)->link_cb_set(dev, callback, user_data);
259}
260
273static inline int phy_read(const struct device *dev, uint16_t reg_addr, uint32_t *value)
274{
275 if (DEVICE_API_GET(ethphy, dev)->read == NULL) {
276 return -ENOSYS;
277 }
278
279 return DEVICE_API_GET(ethphy, dev)->read(dev, reg_addr, value);
280}
281
294static inline int phy_write(const struct device *dev, uint16_t reg_addr, uint32_t value)
295{
296 if (DEVICE_API_GET(ethphy, dev)->write == NULL) {
297 return -ENOSYS;
298 }
299
300 return DEVICE_API_GET(ethphy, dev)->write(dev, reg_addr, value);
301}
302
316static inline int phy_read_c45(const struct device *dev, uint8_t devad, uint16_t regad,
317 uint16_t *data)
318{
319 if (DEVICE_API_GET(ethphy, dev)->read_c45 == NULL) {
320 return -ENOSYS;
321 }
322
323 return DEVICE_API_GET(ethphy, dev)->read_c45(dev, devad, regad, data);
324}
325
339static inline int phy_write_c45(const struct device *dev, uint8_t devad, uint16_t regad,
341{
342 if (DEVICE_API_GET(ethphy, dev)->write_c45 == NULL) {
343 return -ENOSYS;
344 }
345
346 return DEVICE_API_GET(ethphy, dev)->write_c45(dev, devad, regad, data);
347}
348
360static inline int phy_set_plca_cfg(__maybe_unused const struct device *dev,
361 __maybe_unused struct phy_plca_cfg *plca_cfg)
362{
363#if defined(CONFIG_ETH_PHY_API_PLCA)
364 if (DEVICE_API_GET(ethphy, dev)->set_plca_cfg == NULL) {
365 return -ENOSYS;
366 }
367
368 return DEVICE_API_GET(ethphy, dev)->set_plca_cfg(dev, plca_cfg);
369#else
370 return -ENOSYS;
371#endif /* CONFIG_ETH_PHY_API_PLCA */
372}
373
385static inline int phy_get_plca_cfg(__maybe_unused const struct device *dev,
386 __maybe_unused struct phy_plca_cfg *plca_cfg)
387{
388#if defined(CONFIG_ETH_PHY_API_PLCA)
389 if (DEVICE_API_GET(ethphy, dev)->get_plca_cfg == NULL) {
390 return -ENOSYS;
391 }
392
393 return DEVICE_API_GET(ethphy, dev)->get_plca_cfg(dev, plca_cfg);
394#else
395 return -ENOSYS;
396#endif /* CONFIG_ETH_PHY_API_PLCA */
397}
398
410static inline int phy_get_plca_sts(__maybe_unused const struct device *dev,
411 __maybe_unused bool *plca_status)
412{
413#if defined(CONFIG_ETH_PHY_API_PLCA)
414 if (DEVICE_API_GET(ethphy, dev)->get_plca_sts == NULL) {
415 return -ENOSYS;
416 }
417
418 return DEVICE_API_GET(ethphy, dev)->get_plca_sts(dev, plca_status);
419#else
420 return -ENOSYS;
421#endif /* CONFIG_ETH_PHY_API_PLCA */
422}
423
424#ifdef __cplusplus
425}
426#endif
427
431
432#endif /* ZEPHYR_INCLUDE_DRIVERS_PHY_H_ */
#define DEVICE_API_GET(_class, _dev)
Expands to the pointer of a device's API for a given class.
Definition device.h:1425
System error numbers.
static int phy_link_callback_set(const struct device *dev, phy_callback_t callback, void *user_data)
Set link state change callback.
Definition phy.h:251
static int phy_set_plca_cfg(__maybe_unused const struct device *dev, __maybe_unused struct phy_plca_cfg *plca_cfg)
Write PHY PLCA configuration.
Definition phy.h:360
void(* phy_callback_t)(const struct device *dev, struct phy_link_state *state, void *user_data)
Define the callback function signature for phy_link_callback_set() function.
Definition phy.h:133
static int phy_read(const struct device *dev, uint16_t reg_addr, uint32_t *value)
Read PHY registers.
Definition phy.h:273
static int phy_write_c45(const struct device *dev, uint8_t devad, uint16_t regad, uint16_t data)
Write PHY C45 register.
Definition phy.h:339
static int phy_get_link_state(const struct device *dev, struct phy_link_state *state)
Get PHY link state.
Definition phy.h:224
static int phy_read_c45(const struct device *dev, uint8_t devad, uint16_t regad, uint16_t *data)
Read PHY C45 register.
Definition phy.h:316
static int phy_write(const struct device *dev, uint16_t reg_addr, uint32_t value)
Write PHY register.
Definition phy.h:294
phy_cfg_link_flag
Ethernet configure link flags.
Definition phy.h:101
phy_link_speed
Ethernet link speeds.
Definition phy.h:35
static int phy_get_plca_sts(__maybe_unused const struct device *dev, __maybe_unused bool *plca_status)
Read PHY PLCA status.
Definition phy.h:410
static int phy_get_plca_cfg(__maybe_unused const struct device *dev, __maybe_unused struct phy_plca_cfg *plca_cfg)
Read PHY PLCA configuration.
Definition phy.h:385
static int phy_configure_link(const struct device *dev, enum phy_link_speed speeds, enum phy_cfg_link_flag flags)
Configure PHY link.
Definition phy.h:196
@ PHY_FLAG_AUTO_NEGOTIATION_DISABLED
Auto-negotiation disable.
Definition phy.h:103
@ LINK_HALF_10BASE
10Base Half-Duplex
Definition phy.h:37
@ LINK_FULL_2500BASE
2.5GBase Full-Duplex
Definition phy.h:49
@ LINK_FULL_10BASE
10Base Full-Duplex
Definition phy.h:39
@ LINK_HALF_100BASE
100Base Half-Duplex
Definition phy.h:41
@ LINK_FULL_1000BASE
1000Base Full-Duplex
Definition phy.h:47
@ LINK_HALF_1000BASE
1000Base Half-Duplex
Definition phy.h:45
@ LINK_FULL_5000BASE
5GBase Full-Duplex
Definition phy.h:51
@ LINK_FULL_100BASE
100Base Full-Duplex
Definition phy.h:43
#define BIT(n)
Unsigned integer with bit position n set (signed in assembly language).
Definition util_macro.h:44
#define IS_POWER_OF_TWO(x)
Check if a x is a power of two.
Definition util_macro.h:83
#define EINVAL
Invalid argument.
Definition errno.h:60
#define ENOSYS
Function not implemented.
Definition errno.h:82
flags
Definition parser.h:97
state
Definition parser_state.h:29
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT8_TYPE__ uint8_t
Definition stdint.h:88
__UINT16_TYPE__ uint16_t
Definition stdint.h:89
Runtime device structure (in ROM) per driver instance.
Definition device.h:513
void * data
Address of the device instance private data.
Definition device.h:523
PLCA (Physical Layer Collision Avoidance) Reconciliation Sublayer configurations.
Definition phy.h:107
uint8_t to_timer
PLCA to_timer in bit-times, which determines the PLCA transmit opportunity.
Definition phy.h:121
uint8_t node_count
PLCA node count.
Definition phy.h:115
uint8_t version
PLCA register map version.
Definition phy.h:109
bool enable
PLCA configured mode (enable/disable).
Definition phy.h:111
uint8_t node_id
PLCA local node identifier.
Definition phy.h:113
uint8_t burst_count
Additional frames a node is allowed to send in single transmit opportunity (TO).
Definition phy.h:117
uint8_t burst_timer
Wait time for the MAC to send a new frame before interrupting the burst.
Definition phy.h:119
Macro utilities.