Zephyr API Documentation
4.0.0-rc2
A Scalable Open Source RTOS
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nxp_s32k146_clock.h
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/*
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* Copyright 2023 NXP
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32K146_CLOCK_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32K146_CLOCK_H_
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#define NXP_S32_LPO_128K_CLK 1U
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#define NXP_S32_SIRC_CLK 2U
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#define NXP_S32_SIRC_VLP_CLK 3U
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#define NXP_S32_SIRC_STOP_CLK 4U
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#define NXP_S32_FIRC_CLK 5U
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#define NXP_S32_FIRC_VLP_CLK 6U
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#define NXP_S32_FIRC_STOP_CLK 7U
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#define NXP_S32_SOSC_CLK 8U
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#define NXP_S32_SPLL_CLK 9U
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#define NXP_S32_SIRCDIV1_CLK 10U
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#define NXP_S32_SIRCDIV2_CLK 11U
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#define NXP_S32_FIRCDIV1_CLK 12U
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#define NXP_S32_FIRCDIV2_CLK 13U
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#define NXP_S32_SOSCDIV1_CLK 14U
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#define NXP_S32_SOSCDIV2_CLK 15U
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#define NXP_S32_SPLLDIV1_CLK 16U
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#define NXP_S32_SPLLDIV2_CLK 17U
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#define NXP_S32_LPO_32K_CLK 18U
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#define NXP_S32_LPO_1K_CLK 19U
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#define NXP_S32_TCLK0_REF_CLK 20U
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#define NXP_S32_TCLK1_REF_CLK 21U
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#define NXP_S32_TCLK2_REF_CLK 22U
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#define NXP_S32_SCS_CLK 24U
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#define NXP_S32_SCS_RUN_CLK 25U
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#define NXP_S32_SCS_VLPR_CLK 26U
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#define NXP_S32_SCS_HSRUN_CLK 27U
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#define NXP_S32_CORE_CLK 28U
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#define NXP_S32_CORE_RUN_CLK 29U
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#define NXP_S32_CORE_VLPR_CLK 30U
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#define NXP_S32_CORE_HSRUN_CLK 31U
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#define NXP_S32_BUS_CLK 32U
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#define NXP_S32_BUS_RUN_CLK 33U
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#define NXP_S32_BUS_VLPR_CLK 34U
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#define NXP_S32_BUS_HSRUN_CLK 35U
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#define NXP_S32_SLOW_CLK 36U
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#define NXP_S32_SLOW_RUN_CLK 37U
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#define NXP_S32_SLOW_VLPR_CLK 38U
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#define NXP_S32_SLOW_HSRUN_CLK 39U
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#define NXP_S32_RTC_CLK 40U
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#define NXP_S32_LPO_CLK 41U
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#define NXP_S32_SCG_CLKOUT_CLK 42U
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#define NXP_S32_FTM0_EXT_CLK 43U
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#define NXP_S32_FTM1_EXT_CLK 44U
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#define NXP_S32_FTM2_EXT_CLK 45U
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#define NXP_S32_FTM3_EXT_CLK 46U
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#define NXP_S32_FTM4_EXT_CLK 47U
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#define NXP_S32_FTM5_EXT_CLK 48U
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#define NXP_S32_ADC0_CLK 50U
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#define NXP_S32_ADC1_CLK 51U
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#define NXP_S32_CLKOUT0_CLK 52U
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#define NXP_S32_CMP0_CLK 53U
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#define NXP_S32_CRC0_CLK 54U
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#define NXP_S32_DMA0_CLK 55U
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#define NXP_S32_DMAMUX0_CLK 56U
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#define NXP_S32_EIM0_CLK 57U
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#define NXP_S32_ERM0_CLK 58U
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#define NXP_S32_EWM0_CLK 59U
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#define NXP_S32_FLEXCAN0_CLK 60U
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#define NXP_S32_FLEXCAN1_CLK 61U
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#define NXP_S32_FLEXCAN2_CLK 62U
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#define NXP_S32_FLEXIO_CLK 63U
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#define NXP_S32_FTFC_CLK 64U
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#define NXP_S32_FTM0_CLK 65U
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#define NXP_S32_FTM1_CLK 66U
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#define NXP_S32_FTM2_CLK 67U
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#define NXP_S32_FTM3_CLK 68U
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#define NXP_S32_FTM4_CLK 69U
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#define NXP_S32_FTM5_CLK 70U
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#define NXP_S32_LPI2C0_CLK 71U
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#define NXP_S32_LPIT0_CLK 72U
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#define NXP_S32_LPSPI0_CLK 73U
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#define NXP_S32_LPSPI1_CLK 74U
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#define NXP_S32_LPSPI2_CLK 75U
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#define NXP_S32_LPTMR0_CLK 76U
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#define NXP_S32_LPUART0_CLK 77U
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#define NXP_S32_LPUART1_CLK 78U
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#define NXP_S32_LPUART2_CLK 79U
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#define NXP_S32_MPU0_CLK 80U
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#define NXP_S32_MSCM0_CLK 81U
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#define NXP_S32_PDB0_CLK 82U
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#define NXP_S32_PDB1_CLK 83U
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#define NXP_S32_PORTA_CLK 84U
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#define NXP_S32_PORTB_CLK 85U
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#define NXP_S32_PORTC_CLK 86U
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#define NXP_S32_PORTD_CLK 87U
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#define NXP_S32_PORTE_CLK 88U
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#define NXP_S32_RTC0_CLK 89U
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#define NXP_S32_TRACE_CLK 90U
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#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_CLOCK_NXP_S32K146_CLOCK_H_ */
zephyr
dt-bindings
clock
nxp_s32k146_clock.h
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