Zephyr API Documentation 4.2.99
A Scalable Open Source RTOS
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numaker_m333x_reset.h
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1/*
2 * Copyright (c) 2025 Nuvoton Technology Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M333X_RESET_H
8#define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M333X_RESET_H
9
10/* Beginning of M3331 BSP sys_reg.h reset module copy */
11
12#define SYS_IPRST0_CHIPRST_Pos 0
13#define SYS_IPRST0_CPURST_Pos 1
14#define SYS_IPRST0_PDMA0RST_Pos 2
15#define SYS_IPRST0_EBIRST_Pos 3
16#define SYS_IPRST0_PDMA1RST_Pos 5
17#define SYS_IPRST0_SDH0RST_Pos 6
18#define SYS_IPRST0_CRCRST_Pos 7
19#define SYS_IPRST0_CANFD0RST_Pos 8
20#define SYS_IPRST0_CANFD1RST_Pos 9
21#define SYS_IPRST0_HSUSBDRST_Pos 10
22#define SYS_IPRST0_PDCIRST_Pos 11
23#define SYS_IPRST0_HSUSBHRST_Pos 16
24#define SYS_IPRST1_GPIORST_Pos 1
25#define SYS_IPRST1_TMR0RST_Pos 2
26#define SYS_IPRST1_TMR1RST_Pos 3
27#define SYS_IPRST1_TMR2RST_Pos 4
28#define SYS_IPRST1_TMR3RST_Pos 5
29#define SYS_IPRST1_ACMP01RST_Pos 7
30#define SYS_IPRST1_I2C0RST_Pos 8
31#define SYS_IPRST1_I2C1RST_Pos 9
32#define SYS_IPRST1_I2C2RST_Pos 10
33#define SYS_IPRST1_I3C0RST_Pos 11
34#define SYS_IPRST1_QSPI0RST_Pos 12
35#define SYS_IPRST1_SPI0RST_Pos 13
36#define SYS_IPRST1_SPI1RST_Pos 14
37#define SYS_IPRST1_SPI2RST_Pos 15
38#define SYS_IPRST1_UART0RST_Pos 16
39#define SYS_IPRST1_UART1RST_Pos 17
40#define SYS_IPRST1_UART2RST_Pos 18
41#define SYS_IPRST1_UART3RST_Pos 19
42#define SYS_IPRST1_UART4RST_Pos 20
43#define SYS_IPRST1_WWDT0RST_Pos 24
44#define SYS_IPRST1_WWDT1RST_Pos 25
45#define SYS_IPRST1_EADC0RST_Pos 28
46#define SYS_IPRST1_I2S0RST_Pos 29
47#define SYS_IPRST1_HSOTGRST_Pos 30
48#define SYS_IPRST2_USCI0RST_Pos 8
49#define SYS_IPRST2_USCI1RST_Pos 9
50#define SYS_IPRST2_EPWM0RST_Pos 16
51#define SYS_IPRST2_EPWM1RST_Pos 17
52#define SYS_IPRST2_BPWM0RST_Pos 18
53#define SYS_IPRST2_BPWM1RST_Pos 19
54#define SYS_IPRST2_EQEI0RST_Pos 20
55#define SYS_IPRST2_ECAP0RST_Pos 26
56#define SYS_IPRST2_BPWM2RST_Pos 28
57#define SYS_IPRST2_BPWM3RST_Pos 29
58#define SYS_IPRST2_BPWM4RST_Pos 30
59#define SYS_IPRST2_BPWM5RST_Pos 31
60#define SYS_IPRST3_LLSI0RST_Pos 0
61#define SYS_IPRST3_LLSI1RST_Pos 1
62#define SYS_IPRST3_LLSI2RST_Pos 2
63#define SYS_IPRST3_LLSI3RST_Pos 3
64#define SYS_IPRST3_LLSI4RST_Pos 4
65#define SYS_IPRST3_LLSI5RST_Pos 5
66#define SYS_IPRST3_LLSI6RST_Pos 6
67#define SYS_IPRST3_LLSI7RST_Pos 7
68#define SYS_IPRST3_LLSI8RST_Pos 8
69#define SYS_IPRST3_LLSI9RST_Pos 9
70#define SYS_IPRST3_ELLSI0RST_Pos 10
71
72/* End of M3331 BSP sys_reg.h reset module copy */
73
74/* Beginning of M3331 BSP sys.h reset module copy */
75
76/*---------------------------------------------------------------------
77 * Module Reset Control Resister constant definitions.
78 *---------------------------------------------------------------------
79 */
80
81#define NUMAKER_PDMA0_RST ((0UL<<24) | SYS_IPRST0_PDMA0RST_Pos)
82#define NUMAKER_EBI_RST ((0UL<<24) | SYS_IPRST0_EBIRST_Pos)
83#define NUMAKER_PDMA1_RST ((0UL<<24) | SYS_IPRST0_PDMA1RST_Pos)
84#define NUMAKER_SDH0_RST ((0UL<<24) | SYS_IPRST0_SDH0RST_Pos)
85#define NUMAKER_CRC_RST ((0UL<<24) | SYS_IPRST0_CRCRST_Pos)
86#define NUMAKER_CANFD0_RST ((0UL<<24) | SYS_IPRST0_CANFD0RST_Pos)
87#define NUMAKER_CANFD1_RST ((0UL<<24) | SYS_IPRST0_CANFD1RST_Pos)
88#define NUMAKER_HSUSBD_RST ((0UL<<24) | SYS_IPRST0_HSUSBDRST_Pos)
89#define NUMAKER_HSUSBH_RST ((0UL<<24) | SYS_IPRST0_HSUSBHRST_Pos)
90#define NUMAKER_PDCI_RST ((0UL<<24) | SYS_IPRST0_PDCIRST_Pos)
91#define NUMAKER_GPIO_RST ((4UL<<24) | SYS_IPRST1_GPIORST_Pos)
92#define NUMAKER_TMR0_RST ((4UL<<24) | SYS_IPRST1_TMR0RST_Pos)
93#define NUMAKER_TMR1_RST ((4UL<<24) | SYS_IPRST1_TMR1RST_Pos)
94#define NUMAKER_TMR2_RST ((4UL<<24) | SYS_IPRST1_TMR2RST_Pos)
95#define NUMAKER_TMR3_RST ((4UL<<24) | SYS_IPRST1_TMR3RST_Pos)
96#define NUMAKER_ACMP01_RST ((4UL<<24) | SYS_IPRST1_ACMP01RST_Pos)
97#define NUMAKER_I2C0_RST ((4UL<<24) | SYS_IPRST1_I2C0RST_Pos)
98#define NUMAKER_I2C1_RST ((4UL<<24) | SYS_IPRST1_I2C1RST_Pos)
99#define NUMAKER_I2C2_RST ((4UL<<24) | SYS_IPRST1_I2C2RST_Pos)
100#define NUMAKER_I3C0_RST ((4UL<<24) | SYS_IPRST1_I3C0RST_Pos)
101#define NUMAKER_QSPI0_RST ((4UL<<24) | SYS_IPRST1_QSPI0RST_Pos)
102#define NUMAKER_SPI0_RST ((4UL<<24) | SYS_IPRST1_SPI0RST_Pos)
103#define NUMAKER_SPI1_RST ((4UL<<24) | SYS_IPRST1_SPI1RST_Pos)
104#define NUMAKER_SPI2_RST ((4UL<<24) | SYS_IPRST1_SPI2RST_Pos)
105#define NUMAKER_UART0_RST ((4UL<<24) | SYS_IPRST1_UART0RST_Pos)
106#define NUMAKER_UART1_RST ((4UL<<24) | SYS_IPRST1_UART1RST_Pos)
107#define NUMAKER_UART2_RST ((4UL<<24) | SYS_IPRST1_UART2RST_Pos)
108#define NUMAKER_UART3_RST ((4UL<<24) | SYS_IPRST1_UART3RST_Pos)
109#define NUMAKER_UART4_RST ((4UL<<24) | SYS_IPRST1_UART4RST_Pos)
110#define NUMAKER_WWDT0_RST ((4UL<<24) | SYS_IPRST1_WWDT0RST_Pos)
111#define NUMAKER_WWDT1_RST ((4UL<<24) | SYS_IPRST1_WWDT1RST_Pos)
112#define NUMAKER_EADC0_RST ((4UL<<24) | SYS_IPRST1_EADC0RST_Pos)
113#define NUMAKER_I2S0_RST ((4UL<<24) | SYS_IPRST1_I2S0RST_Pos)
114#define NUMAKER_HSOTG_RST ((4UL<<24) | SYS_IPRST1_HSOTGRST_Pos)
115#define NUMAKER_USCI0_RST ((8UL<<24) | SYS_IPRST2_USCI0RST_Pos)
116#define NUMAKER_USCI1_RST ((8UL<<24) | SYS_IPRST2_USCI1RST_Pos)
117#define NUMAKER_EPWM0_RST ((8UL<<24) | SYS_IPRST2_EPWM0RST_Pos)
118#define NUMAKER_EPWM1_RST ((8UL<<24) | SYS_IPRST2_EPWM1RST_Pos)
119#define NUMAKER_BPWM0_RST ((8UL<<24) | SYS_IPRST2_BPWM0RST_Pos)
120#define NUMAKER_BPWM1_RST ((8UL<<24) | SYS_IPRST2_BPWM1RST_Pos)
121#define NUMAKER_EQEI0_RST ((8UL<<24) | SYS_IPRST2_EQEI0RST_Pos)
122#define NUMAKER_ECAP0_RST ((8UL<<24) | SYS_IPRST2_ECAP0RST_Pos)
123#define NUMAKER_BPWM2_RST ((8UL<<24) | SYS_IPRST2_BPWM2RST_Pos)
124#define NUMAKER_BPWM3_RST ((8UL<<24) | SYS_IPRST2_BPWM3RST_Pos)
125#define NUMAKER_BPWM4_RST ((8UL<<24) | SYS_IPRST2_BPWM4RST_Pos)
126#define NUMAKER_BPWM5_RST ((8UL<<24) | SYS_IPRST2_BPWM5RST_Pos)
127#define NUMAKER_LLSI0_RST ((0x18UL<<24) | SYS_IPRST3_LLSI0RST_Pos)
128#define NUMAKER_LLSI1_RST ((0x18UL<<24) | SYS_IPRST3_LLSI1RST_Pos)
129#define NUMAKER_LLSI2_RST ((0x18UL<<24) | SYS_IPRST3_LLSI2RST_Pos)
130#define NUMAKER_LLSI3_RST ((0x18UL<<24) | SYS_IPRST3_LLSI3RST_Pos)
131#define NUMAKER_LLSI4_RST ((0x18UL<<24) | SYS_IPRST3_LLSI4RST_Pos)
132#define NUMAKER_LLSI5_RST ((0x18UL<<24) | SYS_IPRST3_LLSI5RST_Pos)
133#define NUMAKER_LLSI6_RST ((0x18UL<<24) | SYS_IPRST3_LLSI6RST_Pos)
134#define NUMAKER_LLSI7_RST ((0x18UL<<24) | SYS_IPRST3_LLSI7RST_Pos)
135#define NUMAKER_LLSI8_RST ((0x18UL<<24) | SYS_IPRST3_LLSI8RST_Pos)
136#define NUMAKER_LLSI9_RST ((0x18UL<<24) | SYS_IPRST3_LLSI9RST_Pos)
137#define NUMAKER_ELLSI0_RST ((0x18UL<<24) | SYS_IPRST3_ELLSI0RST_Pos)
138
139/* End of M3331 BSP sys.h reset module copy */
140
141#endif