Zephyr API Documentation 4.4.99
A Scalable Open Source RTOS
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numaker_m031x_reset.h
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1/*
2 * Copyright (c) 2026 Nuvoton Technology Corporation.
3 *
4 * SPDX-License-Identifier: Apache-2.0
5 */
6
7#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M031X_RESET_H
8#define ZEPHYR_INCLUDE_DT_BINDINGS_RESET_NUMAKER_M031X_RESET_H
9
15
24
26
32
33/* Beginning of M031 BSP sys_reg.h reset module copy */
34
35#define SYS_IPRST0_CHIPRST_Pos 0
36#define SYS_IPRST0_CPURST_Pos 1
37#define SYS_IPRST0_PDMARST_Pos 2
38#define SYS_IPRST0_EBIRST_Pos 3
39#define SYS_IPRST0_HDIVRST_Pos 4
40#define SYS_IPRST0_CRCRST_Pos 7
41#define SYS_IPRST1_GPIORST_Pos 1
42#define SYS_IPRST1_TMR0RST_Pos 2
43#define SYS_IPRST1_TMR1RST_Pos 3
44#define SYS_IPRST1_TMR2RST_Pos 4
45#define SYS_IPRST1_TMR3RST_Pos 5
46#define SYS_IPRST1_ACMP01RST_Pos 7
47#define SYS_IPRST1_I2C0RST_Pos 8
48#define SYS_IPRST1_I2C1RST_Pos 9
49#define SYS_IPRST1_QSPI0RST_Pos 12
50#define SYS_IPRST1_SPI0RST_Pos 13
51#define SYS_IPRST1_UART0RST_Pos 16
52#define SYS_IPRST1_UART1RST_Pos 17
53#define SYS_IPRST1_UART2RST_Pos 18
54#define SYS_IPRST1_UART3RST_Pos 19
55#define SYS_IPRST1_UART4RST_Pos 20
56#define SYS_IPRST1_UART5RST_Pos 21
57#define SYS_IPRST1_UART6RST_Pos 22
58#define SYS_IPRST1_UART7RST_Pos 23
59#define SYS_IPRST1_USBDRST_Pos 27
60#define SYS_IPRST1_ADCRST_Pos 28
61#define SYS_IPRST2_USCI0RST_Pos 8
62#define SYS_IPRST2_USCI1RST_Pos 9
63#define SYS_IPRST2_PWM0RST_Pos 16
64#define SYS_IPRST2_PWM1RST_Pos 17
65#define SYS_IPRST2_BPWM0RST_Pos 18
66#define SYS_IPRST2_BPWM1RST_Pos 19
67
68/* End of M031 BSP sys_reg.h reset module copy */
69
70/* Beginning of M031 BSP sys.h reset module copy */
71
72/*---------------------------------------------------------------------
73 * Module Reset Control Resister constant definitions.
74 *---------------------------------------------------------------------
75 */
76
77#define NUMAKER_PDMA_RST ((0x0 << 24) | SYS_IPRST0_PDMARST_Pos)
78#define NUMAKER_EBI_RST ((0x0 << 24) | SYS_IPRST0_EBIRST_Pos)
79#define NUMAKER_HDIV_RST ((0x0 << 24) | SYS_IPRST0_HDIVRST_Pos)
80#define NUMAKER_CRC_RST ((0x0 << 24) | SYS_IPRST0_CRCRST_Pos)
81#define NUMAKER_GPIO_RST ((0x4 << 24) | SYS_IPRST1_GPIORST_Pos)
82#define NUMAKER_TMR0_RST ((0x4 << 24) | SYS_IPRST1_TMR0RST_Pos)
83#define NUMAKER_TMR1_RST ((0x4 << 24) | SYS_IPRST1_TMR1RST_Pos)
84#define NUMAKER_TMR2_RST ((0x4 << 24) | SYS_IPRST1_TMR2RST_Pos)
85#define NUMAKER_TMR3_RST ((0x4 << 24) | SYS_IPRST1_TMR3RST_Pos)
86#define NUMAKER_ACMP01_RST ((0x4 << 24) | SYS_IPRST1_ACMP01RST_Pos)
87#define NUMAKER_I2C0_RST ((0x4 << 24) | SYS_IPRST1_I2C0RST_Pos)
88#define NUMAKER_I2C1_RST ((0x4 << 24) | SYS_IPRST1_I2C1RST_Pos)
89#define NUMAKER_QSPI0_RST ((0x4 << 24) | SYS_IPRST1_QSPI0RST_Pos)
90#define NUMAKER_SPI0_RST ((0x4 << 24) | SYS_IPRST1_SPI0RST_Pos)
91#define NUMAKER_UART0_RST ((0x4 << 24) | SYS_IPRST1_UART0RST_Pos)
92#define NUMAKER_UART1_RST ((0x4 << 24) | SYS_IPRST1_UART1RST_Pos)
93#define NUMAKER_UART2_RST ((0x4 << 24) | SYS_IPRST1_UART2RST_Pos)
94#define NUMAKER_UART3_RST ((0x4 << 24) | SYS_IPRST1_UART3RST_Pos)
95#define NUMAKER_UART4_RST ((0x4 << 24) | SYS_IPRST1_UART4RST_Pos)
96#define NUMAKER_UART5_RST ((0x4 << 24) | SYS_IPRST1_UART5RST_Pos)
97#define NUMAKER_UART6_RST ((0x4 << 24) | SYS_IPRST1_UART6RST_Pos)
98#define NUMAKER_UART7_RST ((0x4 << 24) | SYS_IPRST1_UART7RST_Pos)
99#define NUMAKER_USBD_RST ((0x4 << 24) | SYS_IPRST1_USBDRST_Pos)
100#define NUMAKER_ADC_RST ((0x4 << 24) | SYS_IPRST1_ADCRST_Pos)
101#define NUMAKER_USCI0_RST ((0x8 << 24) | SYS_IPRST2_USCI0RST_Pos)
102#define NUMAKER_USCI1_RST ((0x8 << 24) | SYS_IPRST2_USCI1RST_Pos)
103#define NUMAKER_PWM0_RST ((0x8 << 24) | SYS_IPRST2_PWM0RST_Pos)
104#define NUMAKER_PWM1_RST ((0x8 << 24) | SYS_IPRST2_PWM1RST_Pos)
105#define NUMAKER_BPWM0_RST ((0x8 << 24) | SYS_IPRST2_BPWM0RST_Pos)
106#define NUMAKER_BPWM1_RST ((0x8 << 24) | SYS_IPRST2_BPWM1RST_Pos)
107
108/* End of M031 BSP sys.h reset module copy */
109
111
113
115
116#endif