Zephyr API Documentation
4.0.99
A Scalable Open Source RTOS
Loading...
Searching...
No Matches
nrf-pinctrl.h
Go to the documentation of this file.
1
/*
2
* Copyright (c) 2021 Nordic Semiconductor ASA
3
* SPDX-License-Identifier: Apache-2.0
4
*/
5
6
#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NRF_PINCTRL_H_
7
#define ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NRF_PINCTRL_H_
8
9
/*
10
* The whole nRF pin configuration information is encoded in a 32-bit bitfield
11
* organized as follows:
12
*
13
* - 31..24: Pin function.
14
* - 19-23: Reserved.
15
* - 18: Associated peripheral belongs to GD FAST ACTIVE1 (nRF54H only)
16
* - 17: Clockpin enable.
17
* - 16: Pin inversion mode.
18
* - 15: Pin low power mode.
19
* - 14..11: Pin output drive configuration.
20
* - 10..9: Pin pull configuration.
21
* - 8..0: Pin number (combination of port and pin).
22
*/
23
30
#define NRF_FUN_POS 24U
32
#define NRF_FUN_MSK 0xFFU
34
#define NRF_GPD_FAST_ACTIVE1_POS 18U
36
#define NRF_GPD_FAST_ACTIVE1_MSK 0x1U
38
#define NRF_CLOCKPIN_ENABLE_POS 17U
40
#define NRF_CLOCKPIN_ENABLE_MSK 0x1U
42
#define NRF_INVERT_POS 16U
44
#define NRF_INVERT_MSK 0x1U
46
#define NRF_LP_POS 15U
48
#define NRF_LP_MSK 0x1U
50
#define NRF_DRIVE_POS 11U
52
#define NRF_DRIVE_MSK 0xFU
54
#define NRF_PULL_POS 9U
56
#define NRF_PULL_MSK 0x3U
58
#define NRF_PIN_POS 0U
60
#define NRF_PIN_MSK 0x1FFU
61
70
#define NRF_FUN_UART_TX 0U
72
#define NRF_FUN_UART_RX 1U
74
#define NRF_FUN_UART_RTS 2U
76
#define NRF_FUN_UART_CTS 3U
78
#define NRF_FUN_SPIM_SCK 4U
80
#define NRF_FUN_SPIM_MOSI 5U
82
#define NRF_FUN_SPIM_MISO 6U
84
#define NRF_FUN_SPIS_SCK 7U
86
#define NRF_FUN_SPIS_MOSI 8U
88
#define NRF_FUN_SPIS_MISO 9U
90
#define NRF_FUN_SPIS_CSN 10U
92
#define NRF_FUN_TWIM_SCL 11U
94
#define NRF_FUN_TWIM_SDA 12U
96
#define NRF_FUN_I2S_SCK_M 13U
98
#define NRF_FUN_I2S_SCK_S 14U
100
#define NRF_FUN_I2S_LRCK_M 15U
102
#define NRF_FUN_I2S_LRCK_S 16U
104
#define NRF_FUN_I2S_SDIN 17U
106
#define NRF_FUN_I2S_SDOUT 18U
108
#define NRF_FUN_I2S_MCK 19U
110
#define NRF_FUN_PDM_CLK 20U
112
#define NRF_FUN_PDM_DIN 21U
114
#define NRF_FUN_PWM_OUT0 22U
116
#define NRF_FUN_PWM_OUT1 23U
118
#define NRF_FUN_PWM_OUT2 24U
120
#define NRF_FUN_PWM_OUT3 25U
122
#define NRF_FUN_QDEC_A 26U
124
#define NRF_FUN_QDEC_B 27U
126
#define NRF_FUN_QDEC_LED 28U
128
#define NRF_FUN_QSPI_SCK 29U
130
#define NRF_FUN_QSPI_CSN 30U
132
#define NRF_FUN_QSPI_IO0 31U
134
#define NRF_FUN_QSPI_IO1 32U
136
#define NRF_FUN_QSPI_IO2 33U
138
#define NRF_FUN_QSPI_IO3 34U
140
#define NRF_FUN_EXMIF_CK 35U
142
#define NRF_FUN_EXMIF_DQ0 36U
144
#define NRF_FUN_EXMIF_DQ1 37U
146
#define NRF_FUN_EXMIF_DQ2 38U
148
#define NRF_FUN_EXMIF_DQ3 39U
150
#define NRF_FUN_EXMIF_DQ4 40U
152
#define NRF_FUN_EXMIF_DQ5 41U
154
#define NRF_FUN_EXMIF_DQ6 42U
156
#define NRF_FUN_EXMIF_DQ7 43U
158
#define NRF_FUN_EXMIF_CS0 44U
160
#define NRF_FUN_EXMIF_CS1 45U
162
#define NRF_FUN_CAN_TX 46U
164
#define NRF_FUN_CAN_RX 47U
165
174
#define NRF_DRIVE_S0S1 0U
176
#define NRF_DRIVE_H0S1 1U
178
#define NRF_DRIVE_S0H1 2U
180
#define NRF_DRIVE_H0H1 3U
182
#define NRF_DRIVE_D0S1 4U
184
#define NRF_DRIVE_D0H1 5U
186
#define NRF_DRIVE_S0D1 6U
188
#define NRF_DRIVE_H0D1 7U
190
#define NRF_DRIVE_E0E1 8U
191
201
#define NRF_PULL_NONE 0U
203
#define NRF_PULL_DOWN 1U
205
#define NRF_PULL_UP 3U
206
215
#define NRF_LP_DISABLE 0U
217
#define NRF_LP_ENABLE 1U
218
227
#define NRF_PIN_DISCONNECTED NRF_PIN_MSK
228
238
#define NRF_PSEL(fun, port, pin) \
239
((((((port) * 32U) + (pin)) & NRF_PIN_MSK) << NRF_PIN_POS) | \
240
((NRF_FUN_ ## fun & NRF_FUN_MSK) << NRF_FUN_POS))
241
250
#define NRF_PSEL_DISCONNECTED(fun) \
251
(NRF_PIN_DISCONNECTED | \
252
((NRF_FUN_ ## fun & NRF_FUN_MSK) << NRF_FUN_POS))
253
254
#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_PINCTRL_NRF_PINCTRL_H_ */
zephyr
dt-bindings
pinctrl
nrf-pinctrl.h
Generated on Sat Nov 23 2024 03:10:36 for Zephyr API Documentation by
1.12.0