18#ifndef ZEPHYR_INCLUDE_ARCH_MIPS_ARCH_H_
19#define ZEPHYR_INCLUDE_ARCH_MIPS_ARCH_H_
30#include <mips/mipsregs.h>
32#define ARCH_STACK_PTR_ALIGN 16
37#define CP0_STATUS_DEF_RESTORE (ST0_EXL | ST0_IE)
46#define STACK_ROUND_UP(x) ROUND_UP(x, ARCH_STACK_PTR_ALIGN)
51void z_irq_spurious(
const void *unused);
67#define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \
69 Z_ISR_DECLARE(irq_p, 0, isr_p, isr_param_p); \
67#define ARCH_IRQ_CONNECT(irq_p, priority_p, isr_p, isr_param_p, flags_p) \ …
76 if (status & ST0_IE) {
77 write_c0_status(status & ~ST0_IE);
93 write_c0_status(status);
103 __asm__
volatile (
"nop");
static ALWAYS_INLINE void arch_nop(void)
Definition arch.h:348
#define arch_irq_disable(irq)
Definition irq.h:44
#define arch_irq_enable(irq)
Definition irq.h:43
#define arch_irq_is_enabled(irq)
Definition irq.h:45
Per-arch thread definition.
Public interface for configuring interrupts.
static ALWAYS_INLINE unsigned int arch_irq_lock(void)
Definition arch.h:72
static ALWAYS_INLINE void arch_irq_unlock(unsigned int key)
Definition arch.h:83
uint64_t sys_clock_cycle_get_64(void)
uint32_t sys_clock_cycle_get_32(void)
static uint32_t arch_k_cycle_get_32(void)
Definition arch.h:108
static uint64_t arch_k_cycle_get_64(void)
Definition arch.h:115
static ALWAYS_INLINE bool arch_irq_unlocked(unsigned int key)
Definition arch.h:96
__UINT32_TYPE__ uint32_t
Definition stdint.h:90
__UINT64_TYPE__ uint64_t
Definition stdint.h:91
Software-managed ISR table.