Zephyr API Documentation
4.0.0-rc3
A Scalable Open Source RTOS
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memory-attr-riscv.h
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/*
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* Copyright (c) 2023 Carlo Caione <ccaione@baylibre.com>
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_MEM_ATTR_RISCV_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_MEM_ATTR_RISCV_H_
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#include <
zephyr/sys/util_macro.h
>
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#include <
zephyr/dt-bindings/memory-attr/memory-attr.h
>
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/*
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* Architecture specific RISCV related attributes.
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*/
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#define DT_MEM_RISCV_MASK DT_MEM_ARCH_ATTR_MASK
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#define DT_MEM_RISCV_GET(x) ((x) & DT_MEM_RISCV_MASK)
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#define DT_MEM_RISCV(x) ((x) << DT_MEM_ARCH_ATTR_SHIFT)
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#define ATTR_RISCV_TYPE_MAIN BIT(0)
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#define ATTR_RISCV_TYPE_IO BIT(1)
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#define ATTR_RISCV_TYPE_EMPTY BIT(2)
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#define ATTR_RISCV_AMO_SWAP BIT(3)
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#define ATTR_RISCV_AMO_LOGICAL BIT(4)
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#define ATTR_RISCV_AMO_ARITHMETIC BIT(5)
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#define ATTR_RISCV_IO_IDEMPOTENT_READ BIT(6)
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#define ATTR_RISCV_IO_IDEMPOTENT_WRITE BIT(7)
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#define DT_MEM_RISCV_TYPE_MAIN DT_MEM_RISCV(ATTR_RISCV_TYPE_MAIN)
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#define DT_MEM_RISCV_TYPE_IO DT_MEM_RISCV(ATTR_RISCV_TYPE_IO)
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#define DT_MEM_RISCV_TYPE_EMPTY DT_MEM_RISCV(ATTR_RISCV_TYPE_EMPTY)
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#define DT_MEM_RISCV_AMO_SWAP DT_MEM_RISCV(ATTR_RISCV_AMO_SWAP)
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#define DT_MEM_RISCV_AMO_LOGICAL DT_MEM_RISCV(ATTR_RISCV_AMO_LOGICAL)
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#define DT_MEM_RISCV_AMO_ARITHMETIC DT_MEM_RISCV(ATTR_RISCV_AMO_ARITHMETIC)
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#define DT_MEM_RISCV_IO_IDEMPOTENT_READ DT_MEM_RISCV(ATTR_RISCV_IO_IDEMPOTENT_READ)
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#define DT_MEM_RISCV_IO_IDEMPOTENT_WRITE DT_MEM_RISCV(ATTR_RISCV_IO_IDEMPOTENT_WRITE)
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#define DT_MEM_RISCV_UNKNOWN DT_MEM_ARCH_ATTR_UNKNOWN
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#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_MEM_ATTR_RISCV_H_ */
memory-attr.h
util_macro.h
Macro utilities.
zephyr
dt-bindings
memory-attr
memory-attr-riscv.h
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