Zephyr API Documentation
4.0.0-rc3
A Scalable Open Source RTOS
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mchp-xec-ecia.h
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/*
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* Copyright (c) 2021 Microchip Technology
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef __DT_BINDING_MCHP_XEC_ECIA_H
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#define __DT_BINDING_MCHP_XEC_ECIA_H
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/*
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* Encode peripheral interrupt information into a 32-bit unsigned.
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* g = bits[0:4], GIRQ number in [8, 26]
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* gb = bits[12:8], peripheral source bit position [0, 31] in the GIRQ
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* na = bits[23:16], aggregated GIRQ NVIC number
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* nd = bits[31:24], direct NVIC number. For sources without a direct
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* connection nd = na.
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* NOTE: GIRQ22 is a peripheral clock wake only. GIRQ22 and its sources
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* are not connected to the NVIC. Use 255 for na and nd.
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*/
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#define MCHP_XEC_ECIA(g, gb, na, nd) \
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(((g) & 0x1f) + (((gb) & 0x1f) << 8) + (((na) & 0xff) << 16) + \
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(((nd) & 0xff) << 24))
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/* extract specific information from encoded MCHP_XEC_ECIA */
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#define MCHP_XEC_ECIA_GIRQ(e) ((e) & 0x1f)
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#define MCHP_XEC_ECIA_GIRQ_POS(e) (((e) >> 8) & 0x1f)
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#define MCHP_XEC_ECIA_NVIC_AGGR(e) (((e) >> 16) & 0xff)
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#define MCHP_XEC_ECIA_NVIC_DIRECT(e) (((e) >> 24) & 0xff)
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#endif
/* __DT_BINDING_MCHP_XEC_ECIA_H */
zephyr
dt-bindings
interrupt-controller
mchp-xec-ecia.h
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