Zephyr API Documentation
4.0.0-rc2
A Scalable Open Source RTOS
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max32672_dma.h
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/*
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* Copyright (c) 2024 Analog Devices, Inc.
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*
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* SPDX-License-Identifier: Apache-2.0
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*/
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#ifndef ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32672_DMA_H_
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#define ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32672_DMA_H_
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#define MAX32_DMA_SLOT_MEMTOMEM 0x00U
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#define MAX32_DMA_SLOT_SPI0_RX 0x01U
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#define MAX32_DMA_SLOT_SPI1_RX 0x02U
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#define MAX32_DMA_SLOT_SPI2_RX 0x03U
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#define MAX32_DMA_SLOT_UART0_RX 0x04U
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#define MAX32_DMA_SLOT_UART1_RX 0x05U
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#define MAX32_DMA_SLOT_I2C0_RX 0x07U
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#define MAX32_DMA_SLOT_I2C1_RX 0x08U
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#define MAX32_DMA_SLOT_ADC 0x09U
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#define MAX32_DMA_SLOT_I2C2_RX 0x0AU
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#define MAX32_DMA_SLOT_UART2_RX 0x0EU
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#define MAX32_DMA_SLOT_AES_RX 0x10U
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#define MAX32_DMA_SLOT_UART3_RX 0x1CU
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#define MAX32_DMA_SLOT_I2S_RX 0x1EU
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#define MAX32_DMA_SLOT_SPI0_TX 0x21U
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#define MAX32_DMA_SLOT_SPI1_TX 0x22U
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#define MAX32_DMA_SLOT_SPI2_TX 0x23U
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#define MAX32_DMA_SLOT_UART0_TX 0x24U
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#define MAX32_DMA_SLOT_UART1_TX 0x25U
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#define MAX32_DMA_SLOT_I2C0_TX 0x27U
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#define MAX32_DMA_SLOT_I2C1_TX 0x28U
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#define MAX32_DMA_SLOT_I2C2_TX 0x2AU
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#define MAX32_DMA_SLOT_CRC 0x2CU
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#define MAX32_DMA_SLOT_UART2_TX 0x2EU
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#define MAX32_DMA_SLOT_AES_TX 0x30U
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#define MAX32_DMA_SLOT_UART3_TX 0x3CU
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#define MAX32_DMA_SLOT_I2S_TX 0x3EU
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#endif
/* ZEPHYR_INCLUDE_DT_BINDINGS_DMA_MAX32672_DMA_H_ */
zephyr
dt-bindings
dma
max32672_dma.h
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1.12.0